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參數(shù)資料
| 型號(hào)： | S29GL032M10TAIR30 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | Conductive Polymer Chip Capacitors / T530 Series - High Capacitance/Ultra-Low ESR; Capacitance [nom]: 680uF; Working Voltage (Vdc)[max]: 4V; Capacitance Tolerance: +/-20%; Dielectric: Conductive Polymer; ESR: 5.0mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-40; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 4mm; Temperature Range: -55C to +125C; Container: Tape & Reel; Qty per Container: 500; Features: High Capacitance; Ultra-Low ESR |
| 中文描述： | 2M X 16 FLASH 3V PROM, 100 ns, PDSO48 |
| 封裝： | MO-142EC, TSOP-48 |
| 文件頁(yè)數(shù)： | 34/116頁(yè) |
| 文件大?。?/td> | 6024K |
| 代理商： | S29GL032M10TAIR30 |
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22
S29GL-M MirrorBitTM Flash Family
S29GL-M_00_B8 February 7, 2007
Data
Sheet
Device Bus Operations
This section describes the requirements and use of the device bus operations, which are initiated
through the internal command register. The command register itself does not occupy any addres-
sable memory location. The register is a latch used to store the commands, along with the
address and data information needed to execute the command. The contents of the register serve
as inputs to the internal state machine. The state machine outputs dictate the function of the de-
vice. Table 5 lists the device bus operations, the inputs and control levels they require, and the
resulting output. The following subsections describe each of these operations in further detail.
Legend: L = Logic Low = VIL, H = Logic High = VIH, VID = 11.5–12.5 V,
VHH = 11.5 V – 12.5 V, X = Don’t Care, SA = Sector Address, AIN = Address In,
DIN = Data In, DOUT = Data Out
Notes:
1. Addresses are Amax:A0 in word mode; Amax:A-1 in byte mode. Sector addresses are Amax:A15
in both modes.
2. The sector protect and sector unprotect functions may also be implemented via programming
equipment. See the “Sector Group Protection and Unprotection” section.
3. If WP# = VIL, the first or last sector remains protected (for uniform sector devices), and the two
outer boot sectors are protected (for boot sector devices). If WP# = VIH, the first or last sector, or
the two outer boot sectors are protected or unprotected as determined by the method described in
“Sector Group Protection and Unprotection”. All sectors are unprotected when shipped from the
factory (The Secured Silicon Sector may be factory protected depending on version ordered.)
4. DIN or DOUT as required by command sequence, data polling, or sector protect algorithm (see
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O pins operate in the byte or word configura-
tion. If the BYTE# pin is set at logic ‘1’, the device is in word configuration, DQ0–DQ15 are active
and controlled by CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte configuration, and only data I/O pins DQ0–
DQ7 are active and controlled by CE# and OE#. The data I/O pins DQ8–DQ14 are tri-stated, and
the DQ15 pin is used as an input for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must drive the CE# and OE# pins to VIL. CE# is
the power control and selects the device. OE# is the output control and gates array data to the
output pins. WE# should remain at VIH.
Table 5. Device Bus Operations
Operation
CE#
OE
#
WE# RESET#
WP#
AC
C
Addresses
DQ0–
DQ7
DQ8–DQ15
BYTE#
= VIH
BYTE#
= VIL
Read
LL
H
X
AIN
DOUT
DQ8–DQ14
= High-Z,
DQ15 = A-1
Write (Program/Erase)
LH
L
H
AIN
Accelerated Program
LH
L
H
AIN
Standby
VCC ±
0.3 V
XX
VCC ±
0.3 V
X
H
X
High-Z
Output Disable
L
H
X
High-Z
Reset
X
L
X
High-Z
Sector Group Protect
LH
L
VID
HX
SA, A6 =L,
A3=L, A2=L,
A1=H, A0=L
X
Sector Group Unprotect
LH
L
VID
HX
SA, A6=H,
A3=L, A2=L,
A1=H, A0=L
X
Temporary Sector
Group Unprotect
XX
X
VID
HX
AIN
(Note 4)(Note 4)High-Z
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29GL032M10TAIR33 | Conductive Polymer Chip Capacitors / T530 Series - High Capacitance/Ultra-Low ESR; Capacitance [nom]: 680uF; Working Voltage (Vdc)[max]: 2.5V; Capacitance Tolerance: +/-20%; Dielectric: Conductive Polymer; ESR: 6.0mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-40; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 4mm; Temperature Range: -55C to +125C; Container: Tape & Reel; Qty per Container: 500; Features: High Capacitance; Ultra-Low ESR |
| S29GL032M10TAIR40 | CAP 1.0UF 500V 10% X7R RAD-.475 .570X.500 CONF BULK |
| S29GL032M10TAIR43 | CAP TANT 220UF 2.5V 20% POLY SMD |
| S29GL032M10FBCR33 | MirrorBit Flash Family |
| S29GL032M10FAIR50 | MirrorBit Flash Family |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29GL032M10TAIR32 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10TAIR33 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10TAIR40 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology |
| S29GL032M10TAIR42 | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 32MBIT 4MX8/2MX16 100NS 48TSOP - Tape and Reel |
| S29GL032M10TAIR43 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
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