參數(shù)資料
型號(hào): S24C01A
廠商: Seiko Instruments Inc.
元件分類: DRAM
英文描述: The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述: 該CAT24FC02是一個(gè)2 KB的EEPROM的國內(nèi)256個(gè)8位每字舉辦的串行CMOS
文件頁數(shù): 14/23頁
文件大?。?/td> 278K
代理商: S24C01A
CMOS 2-WIRED SERIAL EEPROM
S-24C01A/02A/04A Rev. 2.2
_30
14
Seiko Instruments Inc.
8. Address Increment Timing
The address increment timing is as follows. See Figures 15 and 16. During reading operation, the memory
address counter is automatically incremented at the falling edge of the SCL clock (the 8th read data is
output).
During writing operation, the memory address counter is also automatically incremented at the falling
edge of the SCL clock when the 8th bit write data is fetched.
Figure 15
Address Increment Timing During Reading
SCL
SDA
R / W=1
Address Increment
8
9
1
8
9
D7 Output
D0 Output
ACK Output
Figure 16
Address Increment Timing During Writing
SCL
SDA
R / W=0
8
9
1
8
9
D7
Input
D0
Input
ACK Output
ACK Output
Address Increment
Purchase of I
2
C components of Seiko Instruments Inc. conveys a license under the Philips I
2
C
Patent Rights to use these components in an I
2
C system, provided that the system conforms to the
I
2
C Standard Specification as defined by Philips.
Please note that any product or system incorporating this IC may infringe upon the Philips I
2
C Bus
Patent Rights depending upon its configuration.
In the event that such product or system incorporating the I
2
C Bus infringes upon the Philips Patent
Rights, Seiko Instruments Inc. shall not bear any responsibility for any matters with regard to and
arising from such patent infringement.
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