- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄192292 > S1M8660AX01-F0T0 SPECIALTY TELECOM CIRCUIT, CBCC48 PDF資料下載
參數(shù)資料
| 型號： | S1M8660AX01-F0T0 |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, CBCC48 |
| 封裝： | 7 X 7 MM, BCC-48 |
| 文件頁數(shù)： | 11/32頁 |
| 文件大?。?/td> | 270K |
| 代理商： | S1M8660AX01-F0T0 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當(dāng)前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
RX IF/BBA WITH GPS
S1M8660A (Preliminary)
19
S1M8660A can be used to power down the TCXO/N block using the SPI bus when the CDMA is asleep (CDMA
SLEEP). This mode, installed to minimize the product consumption power, is entered by setting a specific bit
(PWRDWN) in the CLK_GEN_MODE register to '1'. The current in the sleep mode reduces from 300uA to
10uA. The SEN(PIN26) pins decide on whether the product will used the SPI bus or parallel control inputs; if it is
in low, then the pins the parallel control input functions, IDLEB, FMB, and SLEEPB, but if in high then these pins
execute the SPI bus functions, STB, DATA, and CLK. This product does not require any external time constants
in initializing the internal register because it can use the internal reset function. In Qualcomm's devices, time
delay using R and C in the figure blow is applied for the initiation of the chip. The R is used to set SEN high and
then the device can be controlled by SPI. If DC control mode is necessary, C should be replaced with R. Figure.
10 shows the serial bus connection.
SLOT
STB/IDLEB
CLK/SLEEPB
DATA/FMB
SEN
SEL0/PAON
STB/IDLEB
CLK/SEL1
DATA/FMB
SEN
S1M8660A
S1M8657
SLEEPB
SBST/ADC_ENA
SBCK/ADC_CLK
SBDT/ADC_DATA
PAON
MODEM
VDD
8k
Figure 12. Serial Bus connection
The advantage of using the SPI bus is the opportunity given to use all the various functions in the product, thus
allowing more flexibility. Moreover, by tieing all the products using a common bus and controlling them together,
the PCB application area and the number of control pins for the master can be simultaneously reduced, as
compared to controlling the products independently.
Serial Port Interface Operation
The modem, the master, controls slaves such as S1M8660A using the SPI bus.
The STB falling edge indicates the start of the serial I/F data transmission. The STB becomes high to mark the
end of the data transmission.
(Data sent after the STB turns high are not valid.)
Serial line data is captured and stored as soon as the slave or the master places the clock on the falling edge.
The SPI 3-line must remain high for at least 1-clock cycle in order to sent new data.
The MSB always outputs the data line data.
After 9-clocks, which is required to send data, the data line driver opens the data line, at which time the data line
becomes high because of the external pull-up resistance.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S1M8836X01-G0T0 | PLL FREQUENCY SYNTHESIZER, 1000 MHz, CQCC24 |
| S1P-SLV | 1 CONTACT(S), FEMALE, TWO PART BOARD CONNECTOR, CRIMP |
| S1T0567X01-D0B0 | TELECOM, TONE DECODER CIRCUIT, PDIP8 |
| S1U2-12-RC | 500 MHz - 2000 MHz RF/MICROWAVE SGL POLE SGL THROW SWITCH, 1.5 dB INSERTION LOSS |
| S2004VS2 | 4 A, 200 V, SCR, TO-251 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1M8662A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:CDMA/PCS/GPS Triple Mode IF/ baseband IC |
| S1M8662AX01-F0T0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:CDMA/PCS/GPS Triple Mode IF/ baseband IC |
| S1M8821 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:INTERGER RF/IF DUAL PLL |
| S1M8821X01-R0T0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:INTERGER RF/IF DUAL PLL |
| S1M8822 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:INTERGER RF/IF DUAL PLL |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。