參數(shù)資料
型號(hào): S1D15E06T00A00A
廠商: 愛普生(中國)有限公司
英文描述: Direct RAM data display by display data RAM
中文描述: RAM數(shù)據(jù)顯示直接由顯示數(shù)據(jù)RAM
文件頁數(shù): 60/74頁
文件大?。?/td> 490K
代理商: S1D15E06T00A00A
S1D15E06 Series
Rev. 2.1
EPSON
57
(
f
FR
indicates the cycle of rewriting one screen; it does not indicate FR signal cycle.)
[Asterisked references]
*1.
Does not guarantee if there is an abrupt voltage variation during MPU access.
*2.
For V
DD
and V
3
system operating voltage range, see Fig. 9.5.
Applicable when the external power supply is used.
*3.
A0, D0 to D5, D6(SCL), D7(SI), RD(E), WR(R/W), CS1, CS2, CLS, CL, FR, F1, F2, CA, M/S, C86, P/S, DOF,
RES and TEST pins
*4.
D0 to D7, FR, DOF, CL, F1, F2 and CA pins
*5.
A0, RD(E), WR(R/W), CS1, CS2, CLS, M/S, C86, P/S, RES and TEST pins
*6.
Applicable when D0 to D5, D6(SCL), D7(S1), CL, FR, DOF, F1, F2 and CA pins have a high impedance.
*7.
Indicates the resistance when 0.1V voltage is applied between the output pin SEGn or COMn and each power
supply (V
2
, V
1
, V
C
, MV
1
, MV
2
).
R
ON
=0.1V/
I (where
I denotes current when 0.1V is applied when power is on).
*8.
For the relationship between oscillation frequency and frame frequency, see Table 9.8. The standard values of
the external input item are recommended ones.
*9.
The V
C
voltage regulating circuit should be adjusted within the electronic volume operation range.
*10.
Indicates the current consumed by a single IC when display is on. Use the electronic volume for voltage
regulation. Also use the internal oscillator circuit. The current due to LCD panel capacity and wiring capacity
is not included. Applicable when there is access from the MPU.
Relationship between oscillation frequency f
OSC
, display clock frequency f
CL
and liquid crystal frame f
FR
Table 9.8
Item
f
CL
Display mode
Binary display
4 gray-scale
Binary display
4 gray-scale
f
FR
Built-in oscillator
circuit used
Built-in oscillator circuit
not used
See p. 24
(f
CL
×
DUTY)/4
(f
CL
×
DUTY)/8
(f
CL
×
DUTY)/4
(f
CL
×
DUTY)/8
External input (f
CL
)
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