參數(shù)資料
型號: S1D13600F00A
元件分類: 顯示控制器
英文描述: CRT OR FLAT PNL GRPH DSPL CTLR, PQFP64
封裝: QFP6-64
文件頁數(shù): 18/29頁
文件大小: 190K
代理商: S1D13600F00A
S1D13600 Series
Rev. 2.3
EPSON
1–25
Sleep Mode
S1D13600 can enter into the Sleep Mode by setting the “
SLEEP” signal LOW. This mode is prepared to
shut the whole LCD Display Subsystem off with keeping the data in the SRAM. In the Sleep Mode, the
chip will be in the following state.
(1) The internal oscillation is displayed.
(2) VA [0:14] output LOW,
VCS [0:1] output HIGH, VD [0:7] will be high impedance (pins are pulled
HIGH by the integrated pull-up resisters).
(3) “FR”, “YD”, “LP”, “XSCLU”, “XD [0:7]” and “
DOFF” output LOW. VOE, VR/W output HIGH.
(4) “D [0:7]”, “E” “
CS”, “DT/CM” and “RESET” are internally masked but they also should be kept in
invalid state.
9. OSCILLATION DESCRIPTION
S1D13600’s Hardware is optimized to display 320
× 200 LCD panel driven by RAM integrated Segment
Drivers as a default chip configuraiton. This section describes how to determine the frequency which is
input to OSC1 and how to generate the frequency by using the internal oscillation function.
OSC1 Frequency Determination
Conditions: 320
× 200 single scan LCD panel assumes 60 Hz as an LCD frame frequency
(1) “LP” period is obtained by the following calculation.
60
× 200 = 12 kHz
(2) If an external oscillator is used, the OSC1 frequency can be the same as “LP”. Then 12 kHz is the
required frequency for OSC1.
(3) If an internal oscillator is used, the oscillation frequency has to be doubled to be 24 kHz. The internal
oscillation might be unstable below 24 kHz. So if the required frequency is below 20 kHz, it is
recommended to generate doubled frequency. There is a register which divides the internal oscillation
frequency by two, four or eight.
Internal Oscillation
The following figure shows how to connect a capacitance and a resistance to the oscillation pins. The
values of C and R have to be determined on the actual system.
Figure 12. Internal Oscillation Implementation
OSC1
C
OSC2
S1D13600
OSC3
R
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