
S1C63466 TECHNICAL MANUAL
EPSON
7
CHAPTER 1: OUTLINE
(7) Synchronous clock polarity in the serial interface
The polarity of the synchronous clock SCLK and the SRDY signal in slave mode of the serial interface
is selected by the mask option. Either positive polarity or negative polarity can be selected.
Refer to Section 4.11.2, "Mask option", for details.
(8) Buzzer output specification of the sound generator
It is possible to select the polarity of the buzzer signal output from the BZ terminal. Select either
positive polarity or negative polarity according to the external drive transistor to be used.
Refer to Section 4.12.2, "Mask option", for details.
(9) External voltage detection of SVD circuit
External voltage (SVD terminal–VSS terminal) detection can be selected in addition to supply voltage
(VDD terminal–VSS terminal) detection. The SVD terminal is used to input the external voltage to be
detected.
Refer to Section 4.13.2, "Mask option", for details.
(10)OSC1 oscillation circuit
Either crystal oscillation circuit or CR oscillation circuit can be selected as the OSC1 oscillation circuit.
Refer to Section 4.3.2, "OSC1 oscillation circuit", for details.
(11)OSC3 oscillation circuit
Either CR oscillation circuit or ceramic oscillation circuit can be selected as the OSC3 oscillation circuit.
Refer to Section 4.3.3, "OSC3 oscillation circuit", for details.
<Mask option list>
The following is the option list for the S1C63466. Multiple selections are available in each option item as
indicated in the option list. Refer to Chapter 4, "Peripheral Circuits and Operation", to select the specifica-
tions that meet the application system. Be sure to select the specifications for unused functions too,
according to the instruction provided. Use winfog in the S5U1C63000A package for this selection. Refer to
the "S5U1C63000A Manual" for details.
1. OSC1 SYSTEM CLOCK
s
s 1. Crystal (32.768 kHz)
s
s 2. CR
2. OSC3 SYSTEM CLOCK
s
s 1. Use <Ceramic (4 MHz)> or Not Use
s
s 2. Use <CR (1.8 MHz)>
3. MULTIPLE KEY ENTRY RESET COMBINATION
s
s 1. Not Use
s
s 2. Use <K00, K01, K02, K03>
s
s 3. Use <K00, K01, K02>
s
s 4. Use <K00, K01>
4. MULTIPLE KEY ENTRY RESET TIME AUTHORIZE
s
s 1. Not Use
s
s 2. Use
5. INPUT PORT PULL UP RESISTOR
K00
s
s 1. With Resistor
s
s 2. Gate Direct
K01
s
s 1. With Resistor
s
s 2. Gate Direct
K02
s
s 1. With Resistor
s
s 2. Gate Direct
K03
s
s 1. With Resistor
s
s 2. Gate Direct
K10
s
s 1. With Resistor
s
s 2. Gate Direct
K11
s
s 1. With Resistor
s
s 2. Gate Direct
K12
s
s 1. With Resistor
s
s 2. Gate Direct
K13
s
s 1. With Resistor
s
s 2. Gate Direct