參數(shù)資料
型號(hào)： S1C60N09D
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, UUC70
封裝： DIE-70
文件頁(yè)數(shù)： 54/62頁(yè)
文件大小： 476K
代理商： S1C60N09D
CHAPTER 8: PRECAUTIONS ON MOUNTING
52
EPSON
S1C60N09 TECHNICAL MANUAL
CHAPTER
8PRECAUTIONS ON MOUNTING
<Oscillation Circuit>
q Oscillation characteristics change depending on conditions (board pattern, components used, etc.).
In particular, when using a crystal oscillator, use the oscillator manufacturer's recommended values
for constants such as capacitance and resistance.
q Disturbances of the oscillation clock due to noise may cause a malfunction. Consider the following
points to prevent this:
(1) Components which are connected to the OSC1 and OSC2 terminals, such as oscillators, resistors
and capacitors, should be connected in the shortest line.
(2) As shown in the right hand figure, make a VDD pattern as large as
possible at circumscription of the OSC1 and OSC2 terminals and the
components connected to these terminals.
Furthermore, do not use this VDD pattern for any purpose other than
the oscillation system.
q In order to prevent unstable operation of the oscillation circuit due to
current leak between OSC1 and VSS, please keep enough distance between OSC1 and VSS or other
signals on the board pattern.
<Reset Circuit>
q The power-on reset signal which is input to the RESET terminal changes depending on conditions
(power rise time, components used, board pattern, etc.).
Decide the time constant of the capacitor and resistor after enough tests have been completed with the
application product.
When the built-in pull-down resistor is added to the RESET terminal by mask option, take into
consideration dispersion of the resistance for setting the constant.
q In order to prevent any occurrences of unnecessary resetting caused by noise during operating,
components such as capacitors and resistors should be connected to the RESET terminal in the
shortest line.
<Power Supply Circuit>
q Sudden power supply variation due to noise may cause malfunction. Consider the following points to
prevent this:
(1) The power supply should be connected to the VDD and VSS terminal with patterns as short and
large as possible.
(2) When connecting between the VDD and VSS terminals with a bypass capacitor, the terminals
should be connected as short as possible.
VDD
VSS
Bypass capacitor connection example
VDD
VSS
(3) Components which are connected to the VS1, VL1, VL2, VL3 terminals, such as a capacitor, should
be connected in the shortest line.
OSC2
OSC1
VDD
Sample VDD pattern
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