參數(shù)資料
型號: S-4525BA
廠商: Seiko Instruments Inc.
英文描述: Dot Matrix LCD Driver(點(diǎn)陣LCD驅(qū)動器)
中文描述: 點(diǎn)陣LCD驅(qū)動器(點(diǎn)陣液晶驅(qū)動器)
文件頁數(shù): 3/23頁
文件大?。?/td> 166K
代理商: S-4525BA
DOT MATRIX LCD DRIVER
S-4525BA
2
Seiko Instruments Inc.
Terminal Description
Absolute Maximum Ratings
Table 2
Parameter
Symbol
V
SS
V
5
V
1
, V
2
, V
3
, V
4
V
IN
V
OUT
P
D
T
opr
T
stg
Ratings
-8.0 to +0.4
-14.5 to +0.4
V
5
to +0.4
V
SS
-0.4 to +0.4
V
SS
-0.4 to +0.4
250
-30 to +85
-65 to +150
Unit
V
V
V
V
V
mW
°
C
°
C
Supply voltage
LCD drive voltage 1
LCD drive voltage 2
Input voltage
Output voltage
Power dissipation
Operating temperature
Storage temperature
Note
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and the functional operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Pin No.
78
87
Name
V
SS
V
DD
Description
Negative power supply
Positive power supply
LCD drive power supply. Apply correct voltage to each terminal according to this order
: V
DD
V
1
V
2
V
3
V
4
V
5
Display data/display command switching input. Normally connect the last bit of MPU
address bus.
A
0
=”0”: D
0
to D
7
are command inputs and status outputs.
A
0
=”1”: D
0
to D
7
are display data inputs/outputs.
CR oscillation circuit input . Connect R
f
in master operation. NC in slave operation.
[Note]
In 80 family, RDX and WRX are each OR’ed with CSX.
In 68 family, E is ANDed with the invert of CSX.
CR oscillation circuit output or display clock input .
Master operation: CR oscillation circuit output. Connect R
f
.
Slave operation: Display clock input. Connect OSC
2
of the master IC.
Enable clock signal input (68 family MPU). Active “H”.
Read signal input (80 family MPU). Active “L”. RDX “L” puts the data bus in output
status.
Read/write signal input (68 family MPU).
R/WX=”H”: Read
R/WX=”L”: Write
Write signal input (80 family MPU). Active “L”.
3-state input/output. 8-bit bidirectional data bus connection pins.
Interface mode selection and reset. The S-4525BA is reset at the rising and falling
edge of RESX signal. Interface mode is selected by RESX level after the S-4525BA is
reset.
RESX=”H”
: 68 family interface
RESX=”L”
: 80 family interface
Alternating signal input/output.
M/S=”H”: FR signal output
M/S=”L”: FR signal input
Mode selection.
M/S=”H”: Master mode
M/S=”L”: Slave mode
Segment drive output.
90 to 95
V
5
to V
1
73
A
0
OSC
1
OSC
2
E
RDX
R/WX
WRX
D
0
to D
7
79 to 86
88
RESX
89
FR
93
M/S
12 to 72
SEG
60
to to
SEG
0
COM
0
to COM
15
Common drive output (master mode).
Outputs from COM
0
to COM
15
. Scans from pin No.96
100
1
11.
Common drive output (slave mode).
Outputs from COM
16
to COM
31
. Scans from pin No.11
1
100
96.
COM
31
to COM
16
Table 1
74
75
76
77
96 to 100
1 to 11
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