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參數(shù)資料
| 型號： | S-29L131A |
| 廠商： | Seiko Instruments Inc. |
| 英文描述： | 1Kbit CMOS Serial EEPROM(1K位CMOS串行EEPROM) |
| 中文描述： | 1Kbit的CMOS串行EEPROM（每1000位的CMOS串行EEPROM的） |
| 文件頁數(shù)： | 7/44頁 |
| 文件大小： | 192K |
| 代理商： | S-29L131A |
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CMOS SERIAL E
2
PROM
S-29LXX1A Series
6
Seiko Instruments Inc.
Operation
Figure 5
Read Timing
(S-29L221A)
A
0
A
6
12
45
29
14
D
15
D
15
D
14
D
14
D
13
D
14
Hi
-
Z
A
6
A
5
A
4
A
3
A
2
A
1
A
0
+1
D
13
D
0
D
1
D
2
D
15
0
Hi-Z
A
1
A
2
A
3
A
4
A
5
X
0
1
1
28
27
26
25
24
11
10
9
8
7
6
5
4
3
2
1
44
43
42
41
40
A
6
A
5
A
4
A
3
A
2
A
1
A
0
+2
D
13
D
0
D
1
D
2
13
CS
SK
DI
DO
Instructions (in the order of start-bit, instruction, address, and data) are latched to DI in synchronization with the rising
edge of SK after CS goes high. A start-bit can only be recognized when the high of DI is latched at the rising edge of
SK after changing CS to high, it is impossible for it to be recognized as long as DI is low, even if there are SK pulses
after CS goes high. Any SK pulses input while DI is low before receiving a start-bit are called "dummy clocks." The
number of clocks transmitted by the serial interface in a CPU and the number of clocks needed for operation of the
serial memory IC can be adjusted by inserting several dummy clocks before a start-bit. Instruction finishes when CS
goes low, where it must be low between commands during t
CDS
.
All input, including DI and SK signals, is ignored while CS is low, which is stand-by mode.
1. Read
The READ instruction reads data from a specified address. After A0 is latched at the rising edge of SK, DO output
changes from a high-impedance state (Hi-Z) to low level output. 16-bit data is continuously output in synchronization
with the rise of SK.
When all of the data (D
15
to D
0
) in the specified address has been read, the data in the next address can be read with
the input of another SK clock. Thus, the data over whole area of the memory can be read by continuously inputting
SK clocks as long as CS is high.
The last address (An
A1 A0 = 1
11) rolls over to the top address (An
A0 = 0
00).
Figure 4
Read Timing (S-29L131A)
D
15
D
15
D
14
D
14
D
13
D
14
Hi
-
Z
A
5
A
4
A
3
A
2
A
1
A
0
+1
D
13
D
0
D
1
D
2
D
15
0
Hi-Z
A
0
A
1
A
2
A
3
A
4
A
5
0
1
1
28
27
26
25
24
23
12
11
10
9
8
7
6
5
4
3
2
1
44
43
42
41
40
39
A
5
A
4
A
3
A
2
A
1
A
0
+2
D
13
D
0
D
1
D
2
CS
SK
DI
DO
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S-29L220A | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| S-29L220ADFE | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| S-29L220AFE | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| S-29L220AFS | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| S-29L330A | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S-29L131ADFE | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
| S-29L131AFS | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
| S-29L194A | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
| S-29L194ADFE | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
| S-29L194AFS | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
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