參數(shù)資料
型號： S-29L131A
廠商： Seiko Instruments Inc.
英文描述： 1Kbit CMOS Serial EEPROM(1K位CMOS串行EEPROM)
中文描述： 1Kbit的CMOS串行EEPROM（每1000位的CMOS串行EEPROM的）
文件頁數(shù)： 12/44頁
文件大?。?/td> 192K
代理商： S-29L131A
CMOS SERIAL E
2
PROM
S-29LXX1A Series
Seiko Instruments Inc.
11
Receiving a Start-Bit
Three-wire Interface (DI-DO direct connection)
Although the normal configuration of a serial interface is a 4-wire interface to CS, SK, DI, and DO, a 3-wire interface is
also a possibility by connecting DI and DO. However, since there is a possibility that the DO output from the serial
memory IC will interfere with the data output from the CPU with a 3-wire interface, install a resistor between DI and
DO in order to give preference to data output from the CPU to DI (See Figure 16).
Memory Protection
A start-bit can be recognized by latching the high level of DI at the rising edge of SK after changing CS to high
(Start-Bit Recognition). The write operation begins by inputting the write instruction and setting CS to low. The DO
pin then outputs low during the write operation and high at its completion by setting CS to high (Verify Operation).
Therefore, only after a write operation, in order to accept the next command by having CS go high, the DO pin is
switched from a state of high-impedance to a state of data output; but if it recognizes a start-bit, the DO pin returns
to a state of high-impedance (see Figure 3).
Make sure that data output from the CPU does not interfere with the data output from the serial memory IC when
you configure a 3-wire interface by connecting DI input pin and DO output pin. Such interference may cause a start-
bit fetch problem.
DI
DO
SIO
Figure 16
CPU
S-29LXX1A
R : 10 to 100 k
Figure 17 PROTECT Terminal Input Signal Timing
The S-29LXX1A Series is capable of protecting the memory. So, the contents of the memory will not be
miswritten due to error run or malfunction of the CPU. When the PROTECT terminal is connected to GND or
OPEN, write to Bank 1 in the memory array is prohibited (50% of the memory can be protected starting from
address 00). Because the pull-down resistance is connected to the PROTECT terminal internally, the memory
can be automatically protected when the PROTECT terminal is OPEN. When the protection is valid, the data in
the memory of Bank 1 will not be rewritten. However, because the write control circuit inside the IC functions,
the next instruction cannot be executed during the time period of writing (t
PR
). While write instruction is being
input and write is being executed, always connect the PROTECT terminal to “H” “L” or OPEN, and leave the
input signal unchanged (see Figure 17).
CS
VERIFY
Write Instruction Input
DO
busy
Hi-Z
Hi-Z
ready
t
PR
0.2
μ
s Min.
0.2
μ
s Min.
PROTECT
DI
SK
相關(guān)PDF資料
PDF描述
S-29L220A The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-29L220ADFE The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-29L220AFE The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-29L220AFS The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
S-29L330A The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S-29L131ADFE 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM
S-29L131AFS 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM
S-29L194A 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM
S-29L194ADFE 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM
S-29L194AFS 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM
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