
5
RV5VE0
×××
DESCRIPTION OF EACH CIRCUIT
1. Voltage Regulators 1,2
 
Voltage Regulators 1, 2 are linear regulators which can be constructed of external PNP Transistor, and are capa-
ble of obtaining a large output current by a small Dropout Voltage.
 
Output Voltage of each of Voltage Regulators 1, 2 can be set stepwise with a step of 0.1V in the range of 3V to 6V
by laser trim.
 
Voltage Regulators 1, 2 can be turned ON/OFF by Control Pins.
 
Use External PNP Transistor of a low saturation type, with an h
FE
 of 100 or more.
 
Use Voltage Regulators 1, 2 with the attachment of a Capacitor with a capacitance of 10μF or more to the Output
Pins.
2. Voltage Regulators 3,4
 
Voltage Regulators 3, 4 are CMOS type linear regulators and have the same structure as those of Voltage
Regulators R
×
5RL and R
×
5RE series.
 
Output Voltage of each of Voltage Regulators 3, 4 can be set stepwise with a step of 0.1V in the range of 2V to 6V
by laser trim.
 
Voltage Regulators 3, 4 can be turned ON/OFF by Control Pins.
3. Voltage Detector 1
 
When Voltage Detector 1 detects the lowering of V
SEN
1
, the level of the output of Voltage Detector 1 becomes “L”
level.  The output of Voltage Detector 1 is Nch Open Drain Output.
 
Voltage Detector 1 can be set as follows by optional mask:
1. ON/OFF Control of Voltage Detector 1.
2. Output of Voltage Detector 1 at the detection can be set at  “L” level or “H” level.
3. Output of Voltage Detector 1 at OFF can be set at “L” level or “H” level.
4. Sense Pins of Voltage Detectors 1, 2 can be connected to Output R
OUT
1
, R
OUT
2
, R
OUT
3
, R
OUT
4
 of Voltage
Regulators or V
DD
 within the IC. 
4. Voltage Detector 2
 
When Voltage Detector 2 detects the lowering of V
SEN
2
, the level of the output of Voltage Detector 2 becomes “L”
level.  The output of Voltage Detector 2 is Nch Open Drain Output.
 
Voltage Detector 2 can set Reset Delay Time. Delay Time can be set in accordance with the capacitance C
D
 of
External Capacitor as shown on the following pages.
 
Voltage detector 2 can be set as follows by optional mask:
1. ON/OFF Control of Voltage Detector 2.
2. Output of Voltage Detector 2 at the detection can be set at  “L” level or “H” level.
3. Output of Voltage Detector 2 at OFF can be set at  “L” level or “H” level.
4. Sense Pins of Voltage Detectors 2 can be connected to Output R
OUT
1
, R
OUT
2
, R
OUT
3
, R
OUT
4
 of Voltage
Regulators or V
DD
 within the IC.