參數(shù)資料
型號(hào)： RV5C386A
廠(chǎng)商： RICOH COMPANY LTD
元件分類(lèi)： XO, clock
英文描述： I2C-bus Real-Time Clock ICs with Voltage Monitoring Function
中文描述： 0 TIMER(S), REAL TIME CLOCK, PDSO10
封裝： 4 X 2.90 MM, 1.20 MM HEIGHT, SSOP-10
文件頁(yè)數(shù)： 13/42頁(yè)
文件大小： 362K
代理商： RV5C386A
PRELIMINARY RV5C386A
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(5) SCRATCH2
Scratch Bit 2
SCRATCH2
0
1
The SCRATCH2 bit is intended for scratching and accepts the reading and writing of 0 and 1. The SCRATCH2
bit will be set to 0 when the XSTP bit is set to 1 in the Control Register 2.
Periodic Interrupt Flag Bit
CTFG
Description
0
Periodic interrupt output = “H”
1
Periodic interrupt output = “L”
The CTFG bit is set to 1 when the periodic interrupt signals are output from the /INTRA pin (“L”). The CTFG bit
accepts only the writing of 0 in the level mode, which disables (“H”) the /INTRA pin until it is enabled (“L”) again in
the next interrupt cycle. Conversely, setting the CTFG bit to 1 causes no event.
Description
(Default)
(6) CTFG
(Default)
(7) WAFG,DAFG Alarm_W Flag Bit and Alarm_D Flag Bit
WAFG,DAFG
0
Indicating a mismatch between current time and preset alarm time
1
Indicating a match between current time and preset alarm time
The WAFG and DAFG bits are valid only when the WALE and DALE have the setting of 1, which is caused
approximately 61
μ
s after any match between current time and preset alarm time specified by the Alarm_W
registers and the Alarm_D registers. The WAFG (DAFG) bit accepts only the writing of 0. /INTRB (/INTRA) pin
outputs off (“H”) when this bit is set to 0. And /INTRB (/INTRA) pin outputs “L” again at the next preset alarm
time. Conversely, setting the WAFG and DAFG bits to 1 causes no event. The WAFG and DAFG bits will have
the reading of 0 when the alarm interrupt circuit is disabled with the WALE and DALE bits set to 0. The settings
of the WAFG and DAFG bits are synchronized with the output of the /INTRB (/INTRA) pin as shown in the timing
chart below.
Approx. 61
μ
s
Description
(Default)
/INTRB(/INTRA) Pin
Writing of 0 to
WAFG(DAFG) bit
WAFG(DAFG) Bit
(Match between
current time and
preset alarm time)
Approx. 61
μ
s
Writing of 0 to
WAFG(DAFG) bit
(Match between
current time and
preset alarm time)
(Match between
current time and
preset alarm time)
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
RV5C386A_03 制造商:RICOH 制造商全稱(chēng):RICOH electronics devices division 功能描述:I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION
RV5C386A-E2 制造商:RICOH 制造商全稱(chēng):RICOH electronics devices division 功能描述:I2C-bus Real-Time Clock ICs with Voltage Monitoring Function
RV5C387A 制造商:RICOH 制造商全稱(chēng):RICOH electronics devices division 功能描述:I2C-bus Real-Time Clock ICs with Voltage Monitoring Function
RV5C387A_03 制造商:RICOH 制造商全稱(chēng):RICOH electronics devices division 功能描述:I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC WITH VOLTAGE MONITORING FUNCTION
RV5C387AE2 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Industrial Control IC
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