參數(shù)資料
型號: RTL8201CP-VD-LF
廠商: Electronic Theatre Controls, Inc.
英文描述: SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto Crossover)
中文描述: SINGLE-CHIP/SINGLE-PORT個10/100M快速以太網(wǎng)PHYCEIVER(自動交叉)
文件頁數(shù): 33/38頁
文件大?。?/td> 512K
代理商: RTL8201CP-VD-LF
RTL8201CP
Datasheet
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
28
Track ID: JATR-1076-21 Rev. 1.21
8.2.4. SNI Reception Cycle Timing
Table 36. SNI Reception Cycle Timing
Symbol
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
Description
RXCLK high pulse width
RXCLK low pulse width
RXCLK period
RXD0 setup to RXCLK rising edge
RXD0 hold after RXCLK rising edge
Receive frame to CRS high
End of receive frame to CRS low
Decoder acquisition time
Minimum
36
36
80
40
40
Typical
600
Maximum
120
50
160
1800
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Figure 12 shows an example of a packet transfer from PHY to MAC on the SNI interface.
Note: SNI mode only runs at 10Mbps.
RXCLK
RXD0
VIH(min)
VIL(max)
VIH(min)
VIL(max)
t
4
t
5
t
1
t
3
t
2
Figure 12. SNI Reception Cycle Timing-1
RXCLK
RXD0
CRS
TPRX+-
t
6
t
8
t
7
Figure 13. SNI Reception Cycle Timing-2
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