參數(shù)資料
型號: RT8800APQV
廠商: Richtek Technology Corporation
英文描述: General Purpose 3-Phase PWM Controller for High-Density Power Supply
中文描述: 通用三相PWM控制器,用于高密度電源
文件頁數(shù): 13/21頁
文件大?。?/td> 493K
代理商: RT8800APQV
RT8800A
13
DS8800A-04 August 2007
www.richtek.com
All brand name or trademark belong to their owner respectively
Figure 9
COMM
LX
ADJ
x
3
CORE
Δ
I
CORE
R
R
x
R
Δ
V
Line
Load
=
=
Dead Zone Elimination and Output Voltage Offset
Function
RT8800A samples and holds inductor valley current by
time-sharing sourcing a current I
X
to R
COMM
. At light load
condition the inductor valley current and consequently the
voltage V
X
across the sensing capacitor may be negative.
A negative I
X
is required to correctly sense the negative
voltage. However, the RT8800A
CANNOT
provide a negative
I
X
and consequently cannot sense negative inductor
current. This results in dead zone of load line performance
as shown in Figure 10. Therefore a technique as shown in
Figure 11 is required to eliminate the dead zone of load
line at light load condition.
Figure 10
Figure 11
Referring to Figure 11, the Schottky diode provides a
constant voltage drop V
F
with enough bias current. I
X
is
expressed as:
COMM
LX
LX_Valley
R
CSN
LX
LX_Valley
R
F
X
R
I
R
I
V
I
×
+
×
+
=
To make sure RT8800A could sense the inductor current,
right hand side of Equation (1) should always be positive:
0
R
R
I
R
R
I
V
COMM
LX
LX_Valley
CSN
LX
LX_Valley
F
×
+
×
+
Since V
F
>> (I
LX_Valley
x R
LX
) in practical application,
Equation (2) could be simplified as:
COMM
LX
LX_Valley
R
CSN
F
R
I
R
V
×
(1)
(2)
(3)
Droop and Load Lind Setting
The sampled and held phase current I
X
are summed to get
sum(I
X
). RT8800A then sinks a current that is 1/3 sum(I
X
)
and produces a droop voltage that is proportional to the
average phase voltage.
V
ADJ
= 1/3 sum(I
X
) x R
ADJ
V
ADJ
is th
en subtracted form DAC generator output as the
real reference voltage at non-inverting input of the error
amplifier. Consequently, load line slope is calculated as:
+
-
0.8V
V
REF
OVP
500mV
SUM/N
+
-
VID125
VID125
RT9401
VID [0 : 4]
V
CORE
R
ADJ
PI
FB
COMP
I
X
DAC_OUT
)
sum(I
3
1
X
V
CORE
I
CORE
DAC_OUT
V
OFFSET
R
<
Spec_Low
R
CSN
=
R
CSN
>
Load Line
Spec_High
+
-
R
COMM
R
CSN
D
SKY
V
CORE
- V
F
R
CS
C
X
+
V
X
-
R
X
L
X
R
L_X
I
X
I
L
V
CORE
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