參數(shù)資料
型號: RT8800APQV
廠商: Richtek Technology Corporation
英文描述: General Purpose 3-Phase PWM Controller for High-Density Power Supply
中文描述: 通用三相PWM控制器,用于高密度電源
文件頁數(shù): 12/21頁
文件大小: 493K
代理商: RT8800APQV
RT8800A
12
DS8800A-04 August 2007
www.richtek.com
All brand name or trademark belong to their owner respectively
Figure 5. Test Circuit of GM.
Phase Current Balance
The sampled and held phase current I
X
are injected to the
corresponding saw tooth waveforms of PWM comparators.
If phase current I
X
is larger than other phase currents, its
saw tooth waveform will be lift higher than the others. The
RT8800A reduces the duty cycle of corresponding phase
to decrease the phase current accordingly, vice versa.
Over Current Protection
RT8800A uses an external resistor R
IMAX
connected to
IMAX pin to generate a reference current I
IMAX
for over
current protection:
IMAX
IMAX
R
IMAX
I
V
=
where V
IMAX
is 0.8V ty
pical. OCP comparator compares
each sensed phase current I
X
with this reference current
as shown in Figure 6. Equivalently, the maximum phase
current is calculated as :
LX
COMM
R
IMAX
IMAX
R
LX(MAX)
I
R
V
2
3
=
Figure 6. Over Current Comparator.
+
-
1/3 I
X
1/2 I
IMAX
OCP Comparator
The RT8800A uses hiccup mode to eliminate nuisance
detection of OCP or reduce output current when output is
shorted to ground as shown in Figure 7 and 8. The
RT8800A shuts down and latches off afte
r 3 time OCP
hiccups. It can only restart by resetting one of VDD or
DVD pin.
Figure 7. The Over Current Protection in the interval
Figure 8. Over Current Protection at steady state
(5V/Div)
Over Current Protection
Time (25ms/Div)
PWM
I
L
(5V/Div)
Voltage Reference for Converter Output & Load
Droop
The output voltage is sensed at FB pin. The RT8800A
receives an external reference voltage at PI pin as the
non-inverting of the error amplifier and precisely regulates
the FB voltage to this reference voltage. The RT8800A
can provide Intel
VRD10.x or AMD
K8 compliant output
voltage when companioned with DAC generator
RT9401A/B as shown in Figure 9. The RT9401A/B receives
VID[0:4] and produces DAC_OUT that complies with
VRD10.x or K8 VID table. The DAC_OUT is fed to PI pin
through a resistor R
ADJ
as the reference voltage of the
error amplifiers. The VID125 provides a 12.5mV offset for
full compliance of VRD10.x table.
Over Current Protection
Time (25ms/Div)
PWM
V
SS
(5V/Div)
(5V/Div)
+
-
MUX
MUX
S/H
SUM/N
+
-
+
-
ISP1
ISP2
ISP3
ICOMMON
EA
PI
RT9401
R
ADJ
+ V
ADJ
-
I
ADJ
GM
I
X
V
X
V
CORE
DAC_OUT
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