參數(shù)資料
型號: RS5C321B
廠商: RICOH COMPANY LTD
元件分類: XO, clock
英文描述: ULTRA-COMPACT SERIAL REAL-TIME CLOCK ICs WITH 32.768kHz
中文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO8
封裝: 0.65 MM PITCH, SSOP-8
文件頁數(shù): 23/33頁
文件大?。?/td> 252K
代理商: RS5C321B
RS5C321A/B
19
Considerations in Use of XSTP Bit
7. Oscillator Halt Sensing
Oscillation Halt can be sensed through monitoring the XSTP bit with preceding setting of the XSTP bit to 0 by
writing any data to the control register 1. Upon oscillator halt sensing, the XSTP bit is switched from 0 to 1. This
function can be applied to judge clock data validity. The CLEN bit is set to 0 when XSTP=1, and 32KOUT pin is
forced to output 32.768kHz clock pulses.
*
1) While the CE pin is held at the low level, the XSTP bit is set to 1 upon power-on from 0V.
Note that any instantaneous power disconnection may cause operational failure. When the CE pin is held at the high level, oscillation halt is not
sensed and the value of the XSTP bit when the CE pin is held at the low level is retained.
*
2) Once oscillation halt has been sensed, the XSTP bit is held at 1 even if oscillation is restarted.
Ensure error-free oscillation halt sensing by preventing the following:
1) Instantaneous disconnection of VDD
2) Condensation on the crystal oscillator
3) Generation of noise on the PCB in the crystal oscillator
4) Application of voltage exceeding prescribed maximum ratings to the individual pins of the IC
Power-on from 0V
*
1
XSTP
Oscillation halt
Writing of data to
control register 1
(in the presence of oscillation)
Oscillation restart
*
2
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