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參數(shù)資料
| 型號： | RM2991JXQMLV |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 可調(diào)負(fù)電壓單路輸出LDO穩(wěn)壓器 |
| 英文描述： | 3 V-24 V ADJUSTABLE NEGATIVE LDO REGULATOR, 1 V DROPOUT, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數(shù)： | 11/15頁 |
| 文件大?。?/td> | 398K |
| 代理商： | RM2991JXQMLV |
Typical Performance Characteristics (Continued)
Application Hints
External Capacitors
Like any low-dropout regulator, external capacitors are re-
qired to stabilize the control loop. These capacitors must be
correctly selected for proper performance.
INPUT CAPACITOR: An input capacitor is reqiuired if the
regulator is located more than 6
″ from the input power supply
filter capacitor (or if no other input capaciotr is present).
A solid Tantalum or ceramic capacitor whose value is at least
1 F is recommended, but an aluminum electrolytic (
≥ 10 F)
may be used. However, aluminum electrolytics should not be
used in applications where the ambient temperature can
drop below 0C because their internal impedance increases
significantly at cold temperatures.
OUTPUT CAPACITOR: The output capacitor must meet the
ESR limits shown in the graph, which means it must have an
ESR between about 25 m
and 10.
A solid Tantalum (value
≥ 1 F) is the best choice for the out-
put capacitor. An aluminum electrolytic (
≥ 10 F) may be
used if the ESR is in the stable range.
It should be noted that the ESR of a typical aluminum elec-
trolytic will increase by as much as 50X as the temperature
is reduced from 25C down to 40C, while a Tantalum will
exhibit an ESR increase of about 2X over the same range.
For this and other reasons, aluminum electrolytics should
not be used in applications where low operating tempera-
tures occur.
The lower stable ESR limit of 25 m
means that ceramic ca-
pacitors can not be used directly on the output of an LDO. A
ceramic (
≥ 2.2 F) can be used on the output if some exter-
nal resistance is placed in series with it (1
recommended).
Dielectric types X7R or X5R must be used if the temperature
range of the application varies more than ± 25 from ambient
to assure the amount of capacitance is sufficient.
CERAMIC BYPASS CAPACITORS:Many designers place
distributed ceramic capacitors whose value is in the range of
1000 pF to 0.1 F at the power input pins of the IC’s across
a circuit board. These can cause reduced phase margin or
oscillations in LDO regulators.
The advent of multi-layer boards with dedicated power and
ground planes has removed the trace inductance that (previ-
ously) provided the necessary
″decoupling″ to shield the out-
put of the LDO from the effects of bypass capacitors.
These capacitors should be avoided if possible, and kept as
far far away from the LDO output as is practical.
Adjust Pin Current
DS011260-25
Low Voltage Behavior
DS011260-26
Maximum Power
Dissipation (TO-220)
DS011260-27
Maximum Power Dissipation
(TO-263) (See Note 3)
DS011260-28
LM2991
www.national.com
5
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