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參數(shù)資料
| 型號(hào)： | RM009 |
| 廠商： | SKYWORKS SOLUTIONS INC |
| 元件分類(lèi)： | 放大器 |
| 英文描述： | Power Amplifier Module for Dual-band GSM900 DCS1800 |
| 中文描述： | 880 MHz - 915 MHz RF/MICROWAVE NARROW BAND MEDIUM POWER AMPLIFIER |
| 封裝： | 9.10 X 11.60 MM, SO-16 |
| 文件頁(yè)數(shù)： | 3/17頁(yè) |
| 文件大小： | 304K |
| 代理商： | RM009 |
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RM009
Technical Information
Power Amplifier Module for Dual-band GSM900 DCS1800 Applications
101258B
Skyworks Solutions, Inc. Proprietary
11
July 26, 2002
Standby Mode Control
The Combinational Logic cell includes enable circuitry that monitors the APC ramping voltage
from the power amplifier controller (PAC) circuit in the GSM transmitter. Typical handset designs
directly connect the PA VCC to the battery at all times, and for some PA manufacturers this requires
a control signal to set the device in or out of standby mode. The Skyworks PAM does not require a
Transmit Enable input because it contains a standby detection circuit that senses the VAPC to enable
or disable the PA. This feature helps minimize battery discharge when the PA is in standby mode.
When VAPC is below the enable threshold voltage, the PA goes into a standby mode, which reduces
battery current (ICC) to 6
A, typical, under nominal conditions.
For voltages less than 700 mV at the APC input (pin 14), the PA bias is held at ground. As the APC
input exceeds the enable threshold, the bias will activate. After an 8
sec delay, the amplifier
internal bias will ramp quickly to match the ramp voltage applied to the APC input. In order for the
internal bias to precisely follow the APC ramping voltage, it is critical that a ramp pedestal is set to
the APC input at or above the enable threshold level with a timing at least 8
sec prior to ramp-up.
This will be discussed in more detail in the following section, “Power Ramping Considerations for
3GPP Compliance”.
Band Select
The Combinational Logic cell also includes a simple gate arrangement that selects the desired
operational band by activating the appropriate current buffer. The voltage threshold level at the
Band Select input (pin 16) will determine the active path of the bias output to the GaAs die.
Voltage Clamp
The Voltage Clamp circuit will limit the maximum bias voltage output applied to the bases of the
HBT devices on the GaAs die. This provides protection against electrical overstress (EOS) of the
active devices during high voltage and/or load mismatch conditions. Figure 8 shows the typical
transfer function of the APC input to buffer output under resistively loaded conditions. Notice the
enable function near 600 mV, and the clamp acting at 2.15 V, corresponding to a supply voltage of
4.0 V.
Figure 8. Base Bias Voltage vs. APC Input, VCC = 4.0 V
0.0
0.5
1.0
1.5
2.0
2.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
APC input (volts)
Base
Bi
as
(vo
lts)
clamping
occurs
101258_013a
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