參數(shù)資料
型號(hào): RHF1201KSO2
廠商: STMICROELECTRONICS
元件分類: ADC
英文描述: 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO48
封裝: LEAD FREE, HERMETIC SEALED, SOP-48
文件頁(yè)數(shù): 4/26頁(yè)
文件大?。?/td> 328K
代理商: RHF1201KSO2
Application information
RHF1201
12/26
Data format select (DFSB): when set to low level (VIL), the digital input DFSB provides a
two’s complement digital output MSB. This can be of interest when performing some further
signal processing. When set to high level (VIH), DFSB provides a standard binary output
coding.
Output enable (OEB): when set to low level (VIL), all digital outputs remain active. When
set to high level (VIH), all digital output buffers are in high impedance state while the
converter goes on sampling. When OEB is set to a low level again, the data arrives on the
output with a very short Ton delay. This feature enables the chip select of the device.
Figure 7 on page 7 summarizes this functionality.
Slew rate control (SRC): when set to high level (VIH), all digital output currents are limited
to a clamp value so that digital noise power is reduced to the minimum. When set to low
level (VIL), the output edges are twice as fast.
Out of range (OR): this function is implemented on the output stage in order to set an "Out
of Range" flag whenever the digital data is over the full-scale range.
Typically, there is a detection of all the data at ’0’ or all the data at ’1’. It sets an output signal
OR which is in low level state (VOL) when the data stays within the range, or in high level
state (VOH) when the data is out of range.
Data ready (DR): the Data Ready output is an image of the clock being synchronized on the
output data (D0 to D11). This is a very helpful signal that simplifies the synchronization of
the measurement equipment or of the controlling DSP.
As all other digital outputs, DR goes into high impedance state when OEB is set to high level
8.2
Driving the analog input
Figure 8.
Equivalent VIN - VINB
INCM (level 0, code 2048)
(level –FS, code 0)
(level +FS, code 4095)
FS
(Fu
llS
cale)
,2V
p-p
VIN
VINB
VIN-VINB
相關(guān)PDF資料
PDF描述
RHF1401KSO-01V 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO48
RHRXH162373K2 ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, CDFP48
RJ11-6LCT TELECOM AND DATACOM CONNECTOR, JACK
RKS1500DKK Silicon Epitaxial Planar Diode for UHF/VHF tuner Band Switch
RL1024KAQ-011 SPECIALTY ANALOG CIRCUIT, CDIP22
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
RHF1401 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Rad-hard 14-bit 20Msps 85mW A/D converter
RHF1401_12 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Rad-hard 14-bit 30 Msps A/D converter
RHF1401-EVAL 制造商:STMicroelectronics 功能描述:TECHNOLOGY REVIEW - NOVEMBER 2008 ISSUE - Bulk
RHF1401KSO-01V 制造商:STMicroelectronics 功能描述:ADC SGL PIPELINED 20MSPS 14BIT PARALLEL 48SOIC - Bulk 制造商:STMicroelectronics 功能描述:RHF1401KSO-01V AD CONVERTER - Bulk
RHF1401KSO1 制造商:STMicroelectronics 功能描述:ADC SGL PIPELINED 20MSPS 14BIT PARALLEL 48SOIC - Bulk