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參數(shù)資料
| 型號： | RF3321 |
| 廠商： | RF MICRO DEVICES INC |
| 元件分類： | 衰減器 |
| 英文描述： | REVERSE PATH HIGH OUTPUT POWER PROGRAMMABLE GAIN AMPLIFIER |
| 中文描述： | 5 MHz - 65 MHz RF/MICROWAVE NARROW BAND LOW POWER AMPLIFIER |
| 封裝： | SSOP-16 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 195K |
| 代理商： | RF3321 |
Preliminary
2-5
RF3321
Rev A10 010516
3
L
A
Table 1. Serial Interface Control Word Format
Bit
MSB 6
5
4
3
2
1
LSB 0
Serial Bus Timing Diagram
Table 2. Timing Data
Parameter
SCLK Pulsewidth
SCLK Period
Setup Time, SDA versus S CLK
Setup Time, CS versus S CLK
Hold Time, SDA versus S CLK
Hold Time, CS versus S CLK
SCLK Pulsewidth, High
SCLK Pulsewidth, Low
Table 3. Programming State
Mnemonic
D6
D5
D4
D3
D2
D1
D0
Description
Sleep Mode (Software Shutdown)
Gain Control, Bit MSB
Gain Control, Bit 4
Gain Control, Bit 3
Gain Control, Bit 2
Gain Control, Bit 1
Gain Control, Bit LSB
Symbol
T
WH
T
C
T
DS
T
ES
T
DH
T
EH
T
DATAH
T
DATAL
Min
50
100
10
10
20
20
50
50
Typ
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
TX
X
X
X
X
H
L
SHDND
H
H
L
H
X
X
MSB6
L
H*
X
H*
X
X
Enter Sleep Mode
Exit Sleep Mode
Enter Shutdown
Exit Shutdown
TX Enable
TX Disable
H=High Voltage Logic
L=Low Voltage Logic
X=Don’t Care
*Gain Control Data Must be Re-Sent
D0
D1
D2
D3
D4
D5
D6
T
ES
T
DS
T
DH
T
EH
T
WH
T
C
T
DATAH
,T
DATAL
CS
SCLK
SDA
(Data)
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