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參數(shù)資料
| 型號： | RF2905 |
| 廠商： | RF MICRO DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | 433/868/915MHZ FM/FSK/ASK/OOK TRANSCEIVER |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 8/22頁 |
| 文件大小： | 490K |
| 代理商： | RF2905 |
11-60
RF2905
Rev B11 010516
11
T
Pin
39
Function
OSC E
Description
This pin is connected directly to the emitter of the reference oscillator
transistors.
This pin is connected directly to the reference oscillator 1 transistor
base. The intended reference oscillator configuration is a modified Col-
pitts.
Output of the charge pump, and input to the VCO control. An RC net-
work from this pin to ground is used to establish the PLL bandwidth.
Interface Schematic
See pin 38.
40
OSC B1
See pin 38.
41
LOOP FLT
42
VREF P
Bypass pin for the prescaler reference voltage. A 33nF capacitor to
ground is needed to suppress reference spurs in the device. This value
may be different for different PCB arrangements.
This pin provides an analog output indicating the lock status of the PLL.
The amplitude of this signal is typically 200mV
PP
around a DC level of
V
CC
-0.1V.
43
LOCK DET
44
VCC1
This pin is used to supply DC bias to the LNA, Mixer, first IF Amp, and
Bandgap reference. A RF bypass capacitor should be connected
directly to this pin and returned to ground. A 22pF capacitor is recom-
mended for 915MHz applications. A 68pF capacitor is recommended
for 433MHz applications.
Dual-modulus/Dual-divide prescaler output. The output can be inter-
faced to an external PLL IC for additional flexibility in frequency pro-
gramming.
45
PRESCL
OUT
46
VCC3
This pin is used to supply DC bias and collector current to the transmit-
ter PA. A RF bypass capacitor should be connected directly to this pin
and returned to ground. A 22pF capacitor is recommended for 915MHz
applications. A 68pF capacitor is recommended for 433MHz applica-
tions.
This pin is used to vary the transmitter output power. An output level
adjustment range greater than 12dB is provided through analog volt-
age control of this pin. DC current of the transmitter power amp ia also
reduced with output power. This pin MUST be low when the transmitter
is disabled.
47
LVL ADJ
48
PLL ENABL
This pin is used to power up or down the VCO and PLL. A logic high
(PLLENABL>2.0V) powers up the VCO and PLL electronics. A logic
low (PLLENABL<1.0V) powers down the PLL and VCO.
LOOP FLT
V
CC
LOCK DET
20 k
V
CC
PRESCL
OUT
400
4 k
LVL ADJ
40 k
50 k
PLL ENABL
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