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參數(shù)資料
| 型號(hào)： | RF2668 |
| 廠商： | RF MICRO DEVICES INC |
| 元件分類： | 無(wú)繩電話/電話 |
| 英文描述： | CDMA/FM TRANSMIT MODULATOR, IF AGC, AND UPCONVERTER WITH INTEGRATED PLL |
| 中文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT |
| 封裝： | 7 X 7 MM, PLASTIC, LQFP-48 |
| 文件頁(yè)數(shù)： | 7/16頁(yè) |
| 文件大?。?/td> | 430K |
| 代理商： | RF2668 |
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Preliminary
5-77
RF2668
Rev B4 010423
5
M
U
Pin
29
Function
LO1+
Description
External LO input to modulator. Controlled by VCO_EN signal. Logic
low is internal VCO, while logic high is external VCO.
Interface Schematic
30
31
VCO-
VCO+
See VCO+ description.
This port is used to supply DC voltage to the VCO as well as to tune the
center frequency of the VCO. Equal value inductors should be con-
nected to this pin and pin 30 although a small imbalance can be used
to tune in the proper frequency range.
Output of the charge pump, and input to the VCO control. An RC net-
work from this pin to ground is used to establish the PLL bandwidth.
Lock detector output for synthesizer. Requires external transistor to
provide hysteresis and inversion of signal. See Application circuit.
Ground for synthesizer. For best performance, keep traces physically
short and connect immediately to ground plane.
Supply for the PLLVCC only. A 10nF external bypass capacitor is
required and an additional 0.1
μ
F will be required if no other low fre-
quency bypass capacitors are nearby. The trace length between the pin
and the bypass capacitors should be minimized. The ground side of the
bypass capacitors should connect immediately to ground plane.
PLL Setting (Divider) pin. See the PLL settings table.
32
DO
33
LD
34
PLLGND
35
PLLVCC
36
37
38
39
40
SET2
SET1
OSCREF
VREFPLL
PLLISET
Same as pin 36.
TCXO reference input for synthesizer.
Bypass pin for the synthesizer reference voltage.
Current setting pin for synthesizer charge pump. For normal operation,
a 390
resistor to ground should be used to set the current.
Synthesizer Enable pin.
41
42
43
PLLON
VCO_EN
MIX_EN
See pin 45.
VCO Enable pin. Switches between internal and external VCO.
See pin 45.
Power down control for mixer only. When connected to logic “high”
(>V
CC
-0.3) the mixer circuits are operating; when connected to ground
(
≤
0.3V), the mixer is turned off but all other circuits are operating. A DC
voltage less than or equal to the maximum allowable V
CC
may be
applied to this pin when no voltage is applied to the V
CC
pins.
44
TX_EN
Shuts down the entire TX path. VCO is still active when TX disabled.
Logic high (>V
CC
-0.3) for TX Enable.
Power down control for overall circuit. When logic “high” (
≥
V
CC
-0.3V),
all circuits are operating; when logic “l(fā)ow” (
≤
0.3V), all circuits are
turned off. The input impedance of this pin is >10k
. A DC voltage less
than or equal to the maximum allowable Vcc may be applied to this pin
when no voltage is applied to the V
CC
pins.
Selects between CDMA and FM mode. This is a digitally controlled
input. A logic “high” (
≥
V
CC
-0.3V
DC
) selects CDMA mode. A logic “l(fā)ow”
(
<
0.3V
DC
) selects FM mode. In FM mode, this switch enables the FM
amplifier and turns off the I&Q modulator. The impedance on this pin is
30k
. A DC voltage less than or equal to the maximum allowable V
CC
may be applied to this pin when no voltage is applied to the V
CC
pins.
45
CE
46
MODE
1 k
LO1+, FM+
1 k
MIX EN
450
10 k
CE
60 k
60 k
BIAS
MODE
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