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參數(shù)資料
| 型號： | RF2667 |
| 廠商： | RF MICRO DEVICES INC |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | RECEIVE AGC AND DEMODULATOR |
| 中文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PDSO24 |
| 封裝： | PLASTIC, QSOP-24 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 129K |
| 代理商： | RF2667 |
7-3
RF2667
Rev A14 010622
7
Q
D
Pin
1
Function
VCC1
Description
Supply voltage for the LO flip-flop divider and limiting amp. This pin may
be connected in parallel with pins 2 and 3. It should be bypassed by a
10nF capacitor. The trace length between the pin and the bypass
capacitor should be minimized. The ground side of the bypass capaci-
tor should connect immediately to ground plane. The part is designed
to work from a 2.7V to 3.3V supply.
Supply voltage for the bandgap, gain control bias circuitry, and AGC
stages 2, 3, and 4. This pin may be connected in parallel with pins 1
and 3. It should be bypassed by a 10nF capacitor. The trace length
between the pin and the bypass capacitor should be minimized. The
ground side of the bypass capacitor should connect immediately to
ground plane. The part is designed to work from a 2.7V to 3.3V supply.
Supply voltage for the FM and CDMA AGC input stages. This pin may
be connected in parallel with pins 1 and 2. It should be bypassed by a
10nF capacitor. The trace length between the pin and the bypass
capacitor should be minimized. The ground side of the bypass capaci-
tor should connect immediately to ground plane. The part is designed
to work from a 2.7V to 3.3V supply.
CDMA Balanced Input pin. This pin is internally DC biased and should
be DC blocked if connected to a device with a DC level present. For sin-
gle-ended input operation, one pin is used as an input and the other
CDMA input is AC coupled to ground. The balanced input impedance is
2.4k
, while the single-ended input impedance is 1.2k
.
Interface Schematic
2
VCC2
3
VCC3
4
CDMA IN+
5
6
CDMA IN-
GND
Same as pin 4, except complementary input.
See pin 4.
Ground connection. Keep traces physically short and connect immedi-
ately to ground plane for best performance.
Same as pin 6.
7
8
GND
FM IN+
FM Balanced Input pin. This pin is internally DC biased and should be
DC blocked if connected to a device with DC present. For single-ended
input operation, one pin is used as an input and the other FM input is
AC coupled to ground. The balanced input impedance is 2.4k
, while
the single-ended input impedance is 1.2k
.
9
FM IN-
BG OUT
Same as pin 8, except complementary input.
See pin 8.
10
Bandgap Voltage Reference. This voltage, constant over temperature
and supply variation, is used to bias internal circuits. A 10nF external
bypass capacitor is required. The trace length between the pin and the
bypass capacitor should be minimized. The ground side of the bypass
capacitor should connect immediately to ground plane.
AGC decoupling pin. An external bypass capacitor of 10nF capacitor is
required. The trace length between the pin and the bypass capacitor
should be minimized. The ground side of the bypass capacitor should
connect immediately to ground plane.
LO Balanced Input pin. This pin is internally DC biased and should be
DC blocked if connected to a device with DC present. For single-ended
input operation, one pin is used as an input and the other LO input is
AC coupled to ground. The frequency of the signal applied to these
pins is internally divided by a factor of 2, hence the carrier frequency for
the modulator becomes one half of the applied frequency. The single-
ended input impedance is 400
(balanced is 800
). The LO input may
be driven single-ended but balanced provides optimum gain and phase
balance.
11
DEC
12
LO-
13
LO+
Same as pin 12, except complementary input.
See pin 12.
1200
1200
CDMA IN+
BIAS
BIAS
CDMA IN-
1200
1200
FM IN+
BIAS
BIAS
FM IN-
400
400
LO-
BIAS
BIAS
LO+
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