參數(shù)資料
型號: RF2131
廠商: RF MICRO DEVICES INC
元件分類: 衰減器
英文描述: HIGH EFFICIENCY AMPS/ETACS AMPLIFIER
中文描述: 824 MHz - 849 MHz RF/MICROWAVE NARROW BAND MEDIUM POWER AMPLIFIER
封裝: SOP-16
文件頁數(shù): 3/10頁
文件大?。?/td> 84K
代理商: RF2131
2-101
RF2131
Rev B4 010417
2
P
Pin
1
Function
PC
Description
Power Control. When this pin is "low", all circuits are shut off. A "low" is
typically 0.5V or less at room temperature. During normal operation
this pin is the power control. Control range varies from about 2V for
0dBm to 3.6V for +31dBm RF output power. The maximum power that
can be achieved depends on the actual output matching; see the appli-
cation information for more details.
Interface Schematic
2
3
NC
VCC2
Not connected.
Power supply for the driver stage and interstage matching. A shunt
capacitor is required for tuning the interstage to the proper frequency.
The value of this capacitor depends on the operating frequency and
power level. See the application information for details.
4
GND
Ground connection. Keep traces physically short and connect immedi-
ately to the ground plane for best performance.
Same as pin 4.
5
6
GND
GND1
Ground connection for the driver stage. Keep traces physically short
and connect immediately to the ground plane for best performance. It is
recommended to use separate vias to the ground plane for this return
path.
RF Input. This is a 50
input, but the actual impedance depends on the
interstage matching network connected to pin 3. An external DC block-
ing capacitor is required if this port is connected to a DC path to ground
or a DC voltage.
Power supply for the bias circuits. An external RF bypass capacitor is
required. Keep the traces to the capacitor as short as possible, and
connect the capacitor immediately to the ground plane.
This pin is not connected internally; however it needs to be connected
to ground externally. This will improve performance by reducing cou-
pling between pins.
RF Output and power supply for the output stage. The four output pins
are combined, and bias voltage for the final stage is provided through
these pins. The external path must be kept symmetric until combined to
ensure stability. An external matching network is required to provide the
optimum load impedance; see the application schematics for details.
See pin 1 schematic.
7
RF IN
See pin 3 schematic.
8
VCC1
See pin 1 schematic.
9
NC
10
RF OUT
11
12
RF OUT
GND
Same as pin 10.
See pin 10 schematic.
Ground connection for the output stage. Keep traces physically short
and connect immediately to the ground plane for best performance.
Ground connection for the output stage. Keep traces physically short
and connect immediately to the ground plane for best performance.
Same as pin 10.
13
GND
14
15
16
RF OUT
RF OUT
NC
See pin 10 schematic.
Same as pin 10.
See pin 10 schematic.
This pin is not connected internally, however it needs to be connected
to ground externally. This will improve performance by reducing cou-
pling between pins.
80
PC
VCC1
To Bias
Stages
RF IN
VCC2
From Bias
Stages
RF OUT
From Bias
Stages
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