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RC4153
PRODUCT SPECIFICATION
11
Timing
Waveform
on C
Input
Frequency
Input
Frequency
Timing
Waveform
On C
Gitch
Proper
Operation
Improper
Operation
4153-10
O
4153-11
T
TH
O
B
To Switched
Current Source
Trig
Reset
Q
R-S Latch
C
D
C
I
V
Comparator
Ramp
Gen
Detailed Circuit Operation
The circuit consists of a buried zener reference (breakdown
occurs below the surface of the die, reducing noise and
contamination), a high speed one-shot, a high speed
switched precision voltage-to-current converter and an
open-collector output transistor.
Figure 8 shows a block diagram of the high speed one-shot
and Figure 9 shows the monolithic implementation. A trigger
pulse sets the R-S latch, which lets C
O
charge from I
T
. When
the voltage on C
O
exceeds V
TH
. the comparator resets the
latch and discharges C
O
. Looking at the detailed schematic,
a positive trigger voltage turns on Q5, turns off Q4, and turns
on Q3. Q3 provides more drive to Q5 keeping it on and
latching the base of Q11 low. This turns on the switched
current source and turns off Q1, allowing C
O
to charge in a
negative direction. When the voltage on C
O
exceeds V
TH
,
Q13’s collector pulls Q3’s base down, resetting the latch,
turning off the switched current source and discharging C
O
through Q1. Note that all of the transistors in the signal path
are NPNs, and that the voltage swings are minimized ECL
fashion to reduce delays. Minimum delay means minimum
drift of the resultant VFC scale factor at high frequency.
Figure 7. Frequency-to-Voltage Timing Waveforms
Figure 8. One-Shot Block Diagram