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RC5058
15
P
Programmable Active Droop
The RC5058 includes Programmable Active Droop
: as the
output current increases, the output voltage drops, and the
amount of this drop is user adjustable. This is done in order
to allow maximum headroom for transient response of the
converter. The current is typically sensed by measuring the
voltage across the R
DS,on
of the high-side MOSFET during
its on time, as shown in Figure 1.
To program the amount of droop, use the formula
where I
max
is the current at which the droop occurs, and R
sense
is the resistance of the current sensor, either the source resistor
or the high-side MOSFET’s on-resistance. For example, to
get 30mV of droop with a maximum output current of 12.5A
and a 10m
sense resistor, use R
D
= 14.4K
* 12.5A * 10m
/
(30mV * 18) = 3.33K
. Further details on use of the
Programmable Active Droop
may be found in Applications
Bulletin AB-24.
Remote Sense
The RC5058 offers remote sense of the output voltage to
minimize the output capacitor requirements of the converter.
It is highly recommended that the remote sense pin, Pin 20,
be tied directly to the processor power pins, so that the
effects of power plane impedance are eliminated. Further
details on use of the remote sense feature of the RC5058 may
be found in Applications Bulletin AB-24.
Adjusting the Linear Regulators’ Output Voltages
Any or all of the linear regulators’ outputs may be adjusted
high to compensate for voltage drop along traces, as shown
in Figure 6.
Figure 6. Adjusting the Output Voltage of the Linear
Regulator
The resistor value should be chosen as
For example, to get the V
TT
voltage to be 1.55V instead of
1.50V, use R = 10K
* [(1.55/1.50) – 1] = 333
.
Using the RC5058 for Vnorthbridge = 1.8V
In some motherboards, Intel requires that the AGP power can not
be greater than 2.2V while the chipset voltage (Vnorthbridge =
1.8V) is less than 1.0V. The RC5058 can accomplish this by
using the VTT regulator to generate Vnorthbridge. Use the circuit
in Figure 6 with R = 2K
. Since the linear regulators on the
RC5058 all rise proportionally to one another, when Vnorth-
bridge = 1.0V, Vagp = 1.8V, meeting the Intel requirement.
PCB Layout Guidelines
¥ Placement of the MOSFETs relative to the RC5058 is
critical. Place the MOSFETs such that the trace length of
the HIDRV and LODRV pins of the RC5058 to the FET
gates is minimized. A long lead length on these pins will
cause high amounts of ringing due to the inductance of the
trace and the gate capacitance of the FET. This noise radiates
throughout the board, and, because it is switching at such
a high voltage and frequency, it is very difTcult to suppress.
¥ In general, all of the noisy switching lines should be kept
away from the quiet analog section of the RC5058. That
is, traces that connect to pins 1, 2, 23, and 24 (HIDRV, SW,
LODRV and VCCP) should be kept far away from the
traces that connect to pins 3, 20 and 21.
¥ Place the 0.1μF decoupling capacitors as close to the
RC5058 pins as possible. Extra lead length on these
reduces their ability to suppress noise.
¥ Each VCC and GND pin should have its own via to the
appropriate plane. This helps provide isolation between pins.
¥ Place the MOSFETs, inductor, and Schottky as close
together as possible for the same reasons as in the Trst
bullet above. Place the input bulk capacitors as close to
the drains of the high side MOSFETs as possible. In
addition, placement of a 0.1μF decoupling cap right on
the drain of each high side MOSFET helps to suppress
some of the high frequency switching noise on the input
of the DC-DC converter.
¥ Place the output bulk capacitors as close to the CPU as
possible to optimize their ability to supply instantaneous
current to the load in the event of a current transient.
Additional space between the output capacitors and the
CPU will allow the parasitic resistance of the board traces
to degrade the DC-DC converters performance under
severe load transient conditions, causing higher voltage
deviation. For more detailed information regarding
capacitor placement, refer to Application Bulletin AB-5.
¥ A PC Board Layout Checklist is available from Fairchild
Applications. Ask for Application Bulletin AB-11.
R
D
14.4K
*I
max
*R
sense
V
Droop
*18
VFB
VGATE
VOUT
10K
R
R
10K
*
–1
V
out
V
nom
=