
RC5053
PRODUCT SPECIFICATION
2
P
Pin Assignment
Pin Definitions
Pin Number
1
Pin Name
G2
Pin Description
Gate Drive for the Lower N-Channel MOSFET, Q2.
This output will swing
from PV
CC
to GND. It will always be low when G1 is high or when the output
is disabled. To prevent undershoot during a soft start cycle, G2 is held low
until G1 first goes high.
Power Supply for G1 and G2.
PV
CC
must be connected to a potential of at
least V
IN
+ V
GS(ON)Q1
. If V
IN
= 5V, PV
CC
can be generated using a simple
charge pump connected to the switching node between Q1 and Q2 (see
Figure 7), or it can be connected to an auxiliary 12V supply if one exists.
Power Ground.
GND should be connected to a low impedance ground plane
in close proximity to the source of Q2.
Signal Ground.
SGND is connected to the low power internal circuitry and
should be connected to the negative terminal of the output capacitor where it
returns to the ground plane. GND and SGND should be shorted right at the
RC5053.
Power Supply.
Power for the internal low power circuitry. V
CC
should be
wired separately from the drain of Q1 if they share the same supply. A 10
μ
F
bypass capacitor is recommended from this pin to SGND.
Output Voltage Pin.
Connect to the positive terminal of the output capacitor.
There is an internal 120k resistor connected from this pin to SGND. SENSE is
a very sensitive pin; for optimum performance, connect an external 0.1
μ
F
capacitor from this pin to SGND. By connecting a small external resistor
between the output capacitor and the SENSE pin, the initial output voltage can
be raised slightly. Since the internal divider has a nominal impedance of
120k
, a 1200
series resistor will raise the nominal output voltage by 1%.
If an external resistor is used, the value of the 0.1
μ
F capacitor on the SENSE
pin must be greatly reduced or loop phase margin will suffer. Set a time
constant for the RC combination of approximately 0.1
μ
s. So, for example, with
a 1200
resistor, set C = 83pF. Use a standard 100pF capacitor.
Current Limit Threshold.
Current limit is set by the voltage drop across an
external resistor connected between the drain of Q1 and I
MAX
. There is a
180
μ
A internal pull-down at I
MAX
.
2
PV
CC
3
GND
4
SGND
5
V
CC
6
SENSE
7
I
MAX
TOP VIEW
G PACKAGE
20-LEAD PLASTIC SSOP
T
JMAX
= 125
°
C,
θ
JA
= 130
°
C/W (F)
T
JMAX
= 125
°
C,
θ
JA
= 85.2
°
C/W (M)
M PACKAGE
20-LEAD PLASTIC SO
20
19
18
17
16
15
14
13
12
11
G2
PV
CC
GND
SGND
V
CC
SENSE
I
MAX
I
FB
SS
COMP
G1
OUTEN
VID0
VID1
VID2
VID3
VID4
PWRGD
FAULT
OT
1
2
3
4
5
6
7
8
9
10