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RC5060
5
P
Note:
1. Voltage Regulation includes Initial Voltage Setpoint and Output Temperature Drift.
Table 1. Static Power Descriptors
Figure 1. Control Logic for Dual Voltages and Memory Voltages
Figure 2. Deadtime and Overlap Time Measurements
+12V UVLO
+12V UVLO Hysteresis
+5VSTBY Current
+12V Current
Input Logic HIGH
Input Logic LOW
Softstart Current
Control Line Input Current
Over Temperature Shutdown
7.5
1
10
2.5
V
V
MAIN Power Present
25
10
mA
mA
V
V
μA
μA
°C
2.0
0.8
10
SLP_S5#, SLP_S3#, PWROK
10
150
PWROK
0
0
1
1
1
SLP_S3#
0
0
0
0
1
SLP_S5#
0
1
0
1
1
Main
OFF
OFF
OFF
OFF
ON
5 & 3.3V Duals
ON
ON
ON
ON
ON
2.5V Dual/3.3V SDRAM
OFF
ON
OFF
ON, Powered from STBY
ON, Powered from MAIN
State
S5
S3
S0
→
S0
→
S0
S5
S3
Electrical Specifications (continued)
(V
+5VSTBY
= V
+5VMAIN
=5V, V
The denotes specifications which apply over the full operating temperature range.
+3.3V
= 3.3V, V
+12V
= 12V and T
A
= +25°C using circuit in Figure 3, unless otherwise noted.)
Parameter
Conditions
Min.
Typ.
Max.
Units
SLP_S3#
PWROK
STBY
MAIN
DUAL
SLP_S3#
PWROK
STBY
MAIN
MEMORY
SLP_S5#
t
DT
t
DT
OUTPUT 1
OUTPUT2
2V
2V
2V
2V
t
OT
t
OT
OUTPUT1
OUTPUT2
2V
2V
2V
2V