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RC5058
16
P
PC Motherboard Sample Layout and Gerber File
A reference design for motherboard implementation of the
RC5058 along with the PCAD layout Gerber file and silk
screen can be obtained from our marketing department at
650-966-7624.
RC5058 Evaluation Board
Fairchild provides an evaluation board to verify the system
level performance of the RC5058. It serves as a guide to
performance expectations when using the supplied external
components and PCB layout. Please call the marketing
department at 650-966-7624 for an evaluation board.
Additional Information
For additional information contact Fairchild Semiconductor’s
Analog & Mixed Signal Products Group Marketing Department
at 650-966-7624.
Worst-Case Formulae for the Calculation of
Cin, Cout , R5, R7 and Roffset
(Circuits similar to
Figure 1 only)
The following formulae design the RC5058 for worst-case
operation, including initial tolerance and temperature dependence
of all of the IC parameters (initial setpoint, reference tolerance
and tempco, internal droop impedance, current sensor gain),
the initial tolerance and temperature dependence of the MOSFET,
and the ESR of the capacitors. The following information
must be provided:
V
S+
, the value of the positive static voltage limit;
|V
S-
|, the absolute value of the negative static voltage limit;
V
T+
, the value of the positive transient voltage limit;
|V
T-
|, the absolute value of the negative transient voltage limit;
I
O
, the maximum output current;
V
nom
, the nominal output voltage;
V
in
, the input voltage (typically 5V);
I
rms
, the ripple current rating of the input capacitors, per cap
(2A for the Sanyo parts shown in this datasheet);
R
D
, the resistance of the current sensor (usually the MOSFET);
R
D
, the tolerance of the current sensor (usually about 67%
for MOSFET sensing, including temperature); and
ESR, the ESR of the output capacitors, per cap (44m
for
the Sanyo parts shown in this datasheet).
Number of capacitors needed for C
out
= the greater of:
2
I
rms
1.01 * V
nom
V
in
V
nom
V
in
V
nom
*
IO
C
in
–
=
45 * 10
-6
I
O
* R
D
* (1 +
R
D
)
R7
* 1K
=
V
S+
– .024 * V
nom
R
offset
=
18 * (V
S+
+ V
S-
– .024 * V
nom
)
14400 * I
O
* R
D
* (1 +
R
D
) *1.1
R5 =
V
T-
+ V
S+
– .024 * V
nom
ESR * I
O
ESR * I
O
X =
18 * R5 * 1.1
14400 * I
O
* R
D
Y
or
V
T+
– V
S+
+
=