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PRODUCT SPECIFICATION
RC7102
13
Data Byte 3
7
6
5
4
3
2
—
—
26
25
—
—
—
(Reserved)
(Reserved)
Clock Output Disable
Clock Output Disable
(Reserved)
—
—
Low
Low
—
Low
—
—
1
1
1
1
1
1
48Mhz
24MHz
—
Active
Active
—
Active
21, 20, 18, 17 SDRAM8:11 Clock Output Disable (SDRAM
10, 11 only when MODE=1)
32, 31, 29, 28 SDRAM4:7 Clock Output Disable
38, 37, 35, 34 SDRAM0:3 Clock Output Disable
Data Byte 4
7
—
—
6
—
—
5
—
—
4
—
—
3
—
—
2
—
—
1
—
—
0
—
—
Data Byte 5
7
—
—
6
—
—
5
—
—
4
47
IOAPIC
3
—
—
2
—
—
1
46
REF1
0
2
REF0
1
0
Low
Low
Active
Active
1
1
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
1
1
1
1
1
1
1
(Reserved)
(Reserved)
(Reserved)
Clock Output Disable
(Reserved)
(Reserved)
Clock Output Disable
Clock Output Disable
—
—
—
Low
—
—
Low
Low
—
—
—
1
1
1
1
1
1
1
1
Active
—
—
Active
Active
Table 5. Data Bytes 0-5 Serial Configuration Map
(continued)
Bit(s)
Affected Pin
Pin No.
Control Function
Bit Control
Pin Name
0
1
Default