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RC5035
PRODUCT SPECIFICATION
8
A
Main Control Loop
The main control loop of the regulator, see Block Diagram,
contains one main control block. The analog control block
consists of signal conditioning amplifiers that feed into a set
of fast comparators which provide the inputs to control the
clock VCO. The signal conditioning block takes inputs from
the IF
BH
and IF
BL
(current feedback) and VFBSW (voltage
feedback) pins and then sets up two controlling signal paths.
The voltage control path gains up the VFBSW signal and
presents that signal to one of the summing amplifier inputs.
The current control path takes the difference between the
IFBH and IFBL pins and presents that signal to another input
of the summing amplifier. These two signals are then
summed together with the slope compensation input from
the oscillator and the output is then presented to a compara-
tor. This comparator provides the main PWM control signal
to the VCO control block.
There are other comparators in the analog control block that
control the point at which the max-current comparator
disables the output drive signal to the power MOSFET.
The VCO controller section is designed to take the compara-
tor inputs along with the main clock signal from the oscilla-
tor and provide a constant-on-time set of pulses to the
VOSW output pin that will in turn control the external power
MOSFET. The high speed complementary bipolar process
allows the RC5035 to clock at speeds greater then 1MHz.
High Current Output Drivers
The RC5035 high current output driver contains high speed
bipolar power transistors configured in a push-pull configu-
ration. Each output driver is capable of pumping out 1A of
current in less than 100ns. Each driver’s power and ground
are separated from the overall chip power and ground for
added switching noise immunity. The VOSW driver has a
power supply, V
CCP
, which can be derived from an external
12V source or boot-strapped from a flying-capacitor. In the
boot-strapped mode, C2 is connected to the source of M1
and is alternately charged from V
CC
via the schottky diode
DS2 and then boosted up when M1 is turned on. This
provides a V
CCP
voltage equal to 2*V
CC
- Vds(DS2); or
about 9.5V with V
CC
=5V. This voltage is sufficient to
provide the 9V gate drive to the external MOSFET that will
be needed for achieving a low Rdson. If V
CCP
is derived
from an external 12V source, the Rdson is assured of being
low due to the increased gate drive voltage to the power FET
M1 .
Internal Reference
The reference in the RC5035 is a precision band-gap type
reference. Its temperature coefficient is trimmed to provide a
near zero TC. For applications that require a different volt-
age, a pair external resistors can be used change the output
voltage from 2.0V up to 3.6V. For a guaranteed stable
operation under all loading conditions, a 0.1
m
F capacitor is
recommended on the VREF output pin.
Over-Voltage Protection
The RC5035 provides a constant monitor of the output
voltage for over-voltage protection. Should the voltage at the
VFB pin exceed 20% of the selected program voltage, then
an overvoltage condition will be assumed to exist and the
RC5035 will shut down the output drive signals to the power
FETs.
Oscillator
The RC5035 oscillator is designed as a fixed on-time,
variable off-time oscillator. It is comprised of a window
comparator, a fixed current source, an analog switch and an
external timing capacitor. The oscillator will exhibit a fixed
on-time, where the off-time will vary proportional to the
feedback current from the switched-mode regulator. There-
fore, the overall switching frequency of the oscillator will
vary with the load current.
The window comparator is used to provide the constant
on-time, where the analog switch opens when the upper
comparator threshold limit is reached. A fixed current source
then discharges the oscillator capacitor until the lower
comparator threshold is reached. Therefore, the fixed
on-time is derived from a constant current slewing a fixed
capacitor through a constant voltage. The comparator output
directly feeds the output driver circuitry, eliminating the
need for logic circuitry in the PWM. Once the comparator
input reaches the low threshold, the comparator output
switches levels and enables the analog switch. The feedback
current then forces the output to slew up to the comparator
upper threshold. Using this implementation, lighter loads
and/or smaller error voltages will increase the time to reach
the upper comparator threshold and thus increase the overall
switching frequency.
Output Enable/Voltage Select Function
The RC5035 includes an ENABLE pin in order to allow the
user to enable or disable the linear regulator as well as
change the output voltage of the switched-mode regulator
using a single logic input. The ENABLE pin is an open
collector compatible input. When the ENABLE pin is in the
LOW state, the linear regulator is turned on and the RC5035
will operate as a dual output power supply. When the
ENABLE pin is switched to the HIGH state, the op-amp
portion of the linear regulator will turn off. In addition,
an alternate voltage feedback loop from the switched-mode
regulator output will be enabled that re-programs its output
voltage according to a second set of precision resistors.
Using this configuration, the RC5035 can read the
VCC2DET output from a Pentium CPU and program the
outputs to deliver the appropriate voltage(s) to the CPU core
and I/O circuitry depending upon the processor type.
When using the RC5035 in a Flexible Motherboard
application for the Pentium P54C/P55C processors,
a shorting bar must be inserted in the motherboard to join the
CPU core and I/O power islands when a single output is