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參數(shù)資料
| 型號： | RC32434-350BCI |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | IDT TInterprise Integrated Communications Processor |
| 中文描述： | IDT公司TInterprise集成通信處理器 |
| 文件頁數(shù)： | 8/53頁 |
| 文件大小： | 444K |
| 代理商： | RC32434-350BCI |
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8 of 53
January 19, 2006
IDT RC32434
SDI
I/O
Serial Data Input
. This signal is used to shift in serial data. This pin may be
used as a bit input/output port.
SDO
I/O
Serial Data Output
. This signal is used shift out serial data.
I
2
C Bus Interface
SCL
I/O
I
2
C Clock.
I
2
C-bus clock.
SDA
I/O
I
2
C Data Bus.
I
2
C-bus data bus.
Ethernet Interfaces
MIICL
I
Ethernet MII Collision Detected.
This signal is asserted by the ethernet PHY
when a collision is detected.
MIICRS
I
Ethernet MII Carrier Sense.
This signal is asserted by the ethernet PHY when
either the transmt or receive mediumis not idle.
MIIRXCLK
I
Ethernet MII Receive Clock.
This clock is a continuous clock that provides a
timng reference for the reception of data.
This pin also functions as the RMII REF_CLK input.
MIIRXD[3:0]
I
Ethernet MII Receive Data.
This nibble wide data bus contains the data
received by the ethernet PHY.
This pin also functions as the RMII RXD[1:0] input.
MIIRXDV
I
Ethernet MII Receive Data Valid.
The assertion of this signal indicates that
valid receive data is in the MII receive data bus.
This pin also functions as the RMII CRS_DV input.
MIIRXER
I
Ethernet MII Receive Error.
The assertion of this signal indicates that an error
was detected somewhere in the ethernet frame currently being sent in the MII
receive data bus.
This pin also functions as the RMII RX_ER input.
MIITXCLK
I
Ethernet MII Transmit Clock.
This clock is a continuous clock that provides a
timng reference for the transfer of transmt data.
MIITXD[3:0]
O
Ethernet MII Transmit Data.
This nibble wide data bus contains the data to be
transmtted.
This pin also functions as the RMII TXD[1:0] output.
MIITXENP
O
Ethernet MII Transmit Enable.
The assertion of this signal indicates that data
is present on the MII for transmssion.
This pin also functions as the RMII TX_EN output.
MIITXER
O
Ethernet MII Transmit Coding Error.
When this signal is asserted together
with MIITXENP, the ethernet PHY will transmt symbols which are not valid data
or delimters.
MIIMDC
O
MII Management Data Clock.
This signal is used as a timng reference for
transmssion of data on the management interface.
MIIMDIO
I/O
MII Management Data.
This bidirectional signal is used to transfer data
between the station management entity and the ethernet PHY.
EJTAG / JTAG
JTAG_TMS
I
JTAG Mode
. The value on this signal controls the test mode select of the
boundary scan logic or JTAG Controller. When using the EJTAG debug inter-
face, this pin should be left disconnected (since there is an internal pull-up) or
driven high.
S ignal
Type
Name/Desc ription
Table 1 Pin Description (Part 5 of 6)
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| RC32434-400BCI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT TInterprise Integrated Communications Processor |
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