參數(shù)資料
型號: R2043K
廠商: Ricoh Co., Ltd.
英文描述: 4-wire Serial Interface
中文描述: 4線串行接口
文件頁數(shù): 35/48頁
文件大?。?/td> 458K
代理商: R2043K
R2043K/T
12345
Rev.2.05 - 35 -
CT2, CT1, CT0, VDSL, VDET, /CLEN1, CTFG, WAFG, and DAFG bits are reset to 0 in the oscillation adjustment
register, the control register 1, and the control register 2. The PON bit is also set to 1 at power-on from 0v.
< Considerations in Using Oscillation Halt Sensing Circuit >
Be sure to prevent the oscillation halt sensing circuit from malfunctioning by preventing the following:
1) Instantaneous power-down on the VDD
2) Condensation on the crystal oscillator
3) On-board noise to the crystal oscillator
4) Applying to individual pins voltage exceeding their respective maximum ratings
In particular, note that the /XST bit may fail to be set to 0 in the presence of any applied supply voltage as
illustrated below in such events as backup battery installation. Further, give special considerations to prevent
excessive chattering in the oscillation halt sensing circuit.
VDD
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