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參數(shù)資料
| 型號(hào)： | R2023T-E2 |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | XO, clock |
| 英文描述： | 2-wire Serial Interface Real Time Clock IC |
| 中文描述： | REAL TIME CLOCK, PDSO10 |
| 封裝： | 4 X 2.90 MM, 1 MM HEIGHT, TSSOP-10 |
| 文件頁數(shù)： | 11/50頁 |
| 文件大?。?/td> | 512K |
| 代理商： | R2023T-E2 |
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R2023K/T
Address Mapping
11
Address
A3A2A1A0
0
0
0
0
Register Name
Second Counter
D a t a
D6
D5
D4
S40
S20
S10
D7
-
*2)
-
-
D3
S8
D2
S4
D1
S2
D0
S1
0
1
2
0
0
0
1
0
0
1
0
Minute Counter
Hour Counter
M40
-
M20
H20
P/ A
-
M10
H10
M8
H8
M4
H4
M2
H2
M1
H1
3
0
0
1
1
Day-of-week
Counter
Day-of-month
Counter
Month Counter and
Century Bit
Year Counter
Oscillation
Adjustment
Register *3)
Alarm_W
(Minute Register)
Alarm_W
(Hour Register)
Alarm_W
(Day-of-week
Register)
Alarm_D
(Minute Register)
Alarm_D
(Hour Register)
Control Register 1
*3)
Control Register 2
*3)
-
-
-
-
W4
W2
W1
4
0
1
0
0
-
-
D20
D10
D8
D4
D2
D1
5
0
1
0
1
19 /20
-
-
MO10
MO8
MO4
MO2
MO1
6
7
0
1
1
0
0
1
1
1
Y80
DEV
*4)
Y40
F6
Y20
F5
Y10
F4
Y8
F3
Y4
F2
Y2
F1
Y1
F0
8
1
0
0
0
-
WM40
WM20
WM10
WM8
WM4
WM2
WM1
9
1
0
0
1
-
-
WH20
WP/ A
WW5
WH10
WH8
WH4
WH2
WH1
A 1
0
1
0
-
WW6
WW4
WW3
WW2
WW1
WW0
B 1
0
1
1
-
DM40
DM20
DM10
DM8
DM4
DM2
DM1
C 1
1
0
0
-
-
DH20
DP/ A
-
12 /24
DH10
DH8
DH4
DH2
DH1
D 1
1
0
1
E 1
1
1
0
-
-
-
-
-
-
-
WALE
DALE
CLEN2
TEST
CT2
CT1
CT0
F
1
1
1
1
VDSL
VDET
XST
PON
*5)
CLEN1 CTFG WAFG
DAFG
Notes:
* 1) All the data listed above accept both reading and writing.
* 2) The data marked with "-" is invalid for writing and reset to 0 for reading.
* 3) When the PON bit is set to 1 in Control Register 2, all the bits are reset to 0 in Oscillation Adjustment
Register, Control Register 1 and Control Register 2 excluding the
XST
bit.
* 4) When DEV=0, the oscillation adjustment circuit is configured to allow correction of a time count gain or loss
up
to
±
1.5ppm. When DEV=1, the oscillation adjustment circuit is configured to allow correction of a time count
gain or loss up to or
±
0.5ppm.
* 5) PON is a power-on-reset flag.
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