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參數(shù)資料
| 型號： | PTN1111BD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 1:10 PECL clock distribution device |
| 中文描述： | LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-358-1, LQFP-32 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大小： | 53K |
| 代理商： | PTN1111BD |
Philips Semiconductors
Product data
PTN1111
1:10 PECL clock distribution device
2001 Jun 19
3
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
SYMBOL
PARAMETER
LIMITS
UNIT
V
CC
Supply voltage
Electrostatic discharge (Human Body Model; 1.5 k
, 100 pF)
Electrostatic discharge (Machine Model; 0 k
, 200 pF)
–0.5 to +4.6
V
ESDHBM
>2
kV
ESDMM
>200
V
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
MIN
MAX
UNIT
V
CC
V
IR
T
amb
Supply voltage
2.375
3.8
V
Receiver input voltage
V
EE
–40
V
CC
+85
V
°
C
Operating ambient temperature range in free air
DC ELECTRICAL CHARACTERISTICS
T
amb
= –40
°
C to +85
°
C unless otherwise specified; V
CC
= 3.3 V
SYMBOL
PARAMETER
MIN
TYP
MAX
UNIT
V
OH
V
OL
V
IH
V
IL
V
BB
V
CC
I
IH
I
EE
I
CC
Output HIGH voltage
2.275
2.345
2.420
V
Output LOW voltage
1.490
1.595
1.680
V
Input HIGH voltage
2.135
–
2.420
V
Input LOW voltage
1.490
–
1.825
V
Output reference voltage
1.92
–
2.04
V
Power supply voltage
2.375
–
3.8
V
μ
A
mA
Input HIGH current
–
–
150
Power supply current, internal
–
80
120
Power supply current including load: 50 to V
CC
– 2.0 V
–
340
–
mA
NOTE:
1. These values are for V
CC
= 3.3 V; PECL level specifications are referenced to V
CC
and will track 1:1 with variation of V
CC
.
AC ELECTRICAL CHARACTERISTICS
T
amb
= –40
°
C to +85
°
C unless otherwise specified; V
CC
= V
CCmin
to V
CCmax;
V
EE
= 0 V
SYMBOL
Propagation delay input (differential) to output
t
PHL
Propagation delay input (single-ended) to output
PARAMETER
MIN
–
TYP
400
MAX
680
UNIT
ps
t
PLH
–
400
680
ps
Clock output skew, within device
–
20
40
ps
t
skew
Clock output skew, part-to-part
–
80
110
ps
Clock output pulse skew
–
50
160
ps
f
MAX
t
Pclk_set
V
PP1
t
r
/t
f
Maximum input frequency
–
1.5
–
GHz
Propagation delay CLK_SEL transition to stable Qn/Qn output
–
5
10
ns
Input swing
0.5
0.8
1.3
V
Output rise/fall time at 20% and 80% intersects
–
200
–
ps
NOTE:
1. Required to maintain AC specifications. Actual device accepts V
PP
of 100 mV or higher.
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