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參數(shù)資料
| 型號： | PT7A6525 |
| 英文描述： | Reference design kit featuring a High Power Class D Audio Power Amplifier |
| 中文描述： | 雙通道協(xié)議控制器？ |用戶手冊PT7A6525（6）演示的DMA模式？（PDF格式系統(tǒng)） |
| 文件頁數(shù)： | 37/41頁 |
| 文件大?。?/td> | 1640K |
| 代理商： | PT7A6525 |
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5
PT Pericom Technology Inc.
The Demo Board of PT7A6525
in DMA Mode
CPU of the Demo Board
The demo board uses MC68HC000 as its CPU. This
microprocessor is of 16-bit data bus and 20-bit address
bus. These two bus are not multiplexed. The low-order
byte (D0~D7) of the data bus has a odd address, one
count higher than the address of the high-order byte
(D8~D15).
The bus of MC68HC000 is Motorola Bus Mode. But
the system bus is in Intel Bus Mode because the ROM,
RAM, and 8237 all work in Intel Bus Mode. So the
control signals as BR, BG, BGACK, IPL0~2 cannot
connect to DMA controller directly. All these signals
need be adapted by EPLD. They are related to HLDA,
HRQ signals of DMA controller 8237.
The circuit of MC68HC000 is shown in Appendix A,
Schematics 1. This schematic also shows the reset cir-
cuit. The detail of MC68HC000 can be seen in its User’s
Manual and Programmer’s Reference Manual of
MC68HC000.
The supervisor program of the MC68HC000 is stored
in ROM, two AM29F010. This program is a simple
communication routine between the demo board and
the demo program on PC. It only received the read/
write commands from PC via RS232 serial interface
and read/write the data from/to the address defined in
the commands.
To simplify the designment of the peripheral circuit of
MC68HC000 and the supervisor program of micropro-
cessor, the interrupt is not processed by MC68HC000
and the IPL0~2 are not influenced by PT7A6525 INT
output. The status of PT7A6525 is checked by demo
program from ISTA register of PT7A6525.
ROM
The two ROM chips are all 8-bit data bus. To connect
them to 16-bit data bus of MC68HC000, the two chips
works in bit-extended mode. The A1 of address bus is
connected to A0 of ROM chip, and A2 to A1 of ROM
chip, etc. The D0~D7 pins of these two chips are con-
nected to D0~D7 and D8~D15 respectively. The chip-
selected signal is derived from the decoder in EPLD.
The circuit is shown in Appendix A, Schematics 2.
RS232 Serial Interface
The demo board connects to PC via a RS232 Serial
Interface. The connector is a 9-PIN RS232 female con-
nector. The pin definition is as follows:
Pin 2
TxD
Pin 3
RxD
Pin 5
GND
This definition is the same as a DCE.
MC6850 is used to implement parallel-serial transform.
It is a UART interface for MC68HC000. The clock of
serial transmitter and receiver is 16-divided from the
1.544MHz output of PT7A4402.
MAX232A is used as the RS232 level driver and re-
ceiver.
The circuit of the RS232 serial interface is shown in
Appendix A, Schematics 3.
Schematics 3 shows some other peripheral circuits. The
LEDs are used here only as working flags.
RAM
There are two UT6264 chips used in this demo board
as system RAM. These memory chips are of 8-bit data
bus. They are connected to 16-bit data bus in bit-ex-
tended mode. The RAM circuit is shown in Appendix
A, Schematics 2.
The address bus connections are the same as ROM.
One chip connects to low byte (D0~D7) of the data
bus, the other to high byte. These two chips have dif-
ferent chip-select signals. Signal RAML is for the chip
connected to D0~D7 and RAMH for the chip connected
to D8~D15. These two chip-select signal are derived
from EPLD and they are controlled by LDS and UDS
from MC68HC000.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PT7A6525L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual-channel Protocol Controller? | Brief?(PDF) |
| PT7A6526 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-channel Protocol Controller? | User＇s manual for PT7A6525(6) demo system in interrupt mode?(PDF) |
| PT7A6527 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad-channel Protocol Controller? | Demo board Schematic and Program?(PDF) |
| PT7A6632 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:PT7A6632 32-Channel HDLC Controller |
| PT7A6632J | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:PT7A6632 32-Channel HDLC Controller |
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