參數(shù)資料
型號: PT7A4408L
英文描述: Complete BrainPower Control System Accelerator Verilog Object Code Manual
中文描述: T1/E1/OC3系統(tǒng)同步?
文件頁數(shù): 2/34頁
文件大?。?/td> 306K
代理商: PT7A4408L
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Data Sheet
PT7A4402B/4402L
T1/E1 System Synchronizer
PT0100(08/02)
Ver:0
10
Mode/State Control Machine
The Mode/State Control Machine determines whether the
PT7A4402B/4402L operates in Automatic or Manual mode,
and whether it is in the Normal, Holdover or Free-Run state. In
Automatic Mode, the PT7A4402B/4402L selects one of three
states, Normal, Holdover or Free-Run State. The sequence is
determined by LOS1, LOS2 and GTi signals. In Manual Mode,
a single state of operation is selected, in accordance with the
MS1, MS2, GTi and RSEL signals.
All mode and state changes are synchronous with the rising
edge of F8. See the Modes and States of Operation section for
complete details.
Guard Time Circuit
The Guard Time Circuit sends control signal (GTi) to Mode/
State Control Machine for control of Modes and States. It has
two functions:
- enabling/disabling the TIE Corrector (Manual and Au-
tomatic) (Refer to Table 6 and 7);
- selecting which mode change takes place (Automatic
only).
Under Automatic Mode and in Primary Normal State, two state
changes are possible (not counting Auto-Holdover). They are:
- Primary Normal to Primary Holdover, and
- Primary Normal to Secondary Normal.
The level at the GTi pin determines which state occurs. When
- GTi=0, Primary Normal to Primary Holdover,
- GTi=1, Primary Normal to Secondary Normal.
Input Impairment Monitor
This circuit monitors the input signals to the DPLL and auto-
matically enables the Holdover State (Auto-Holdover) when
the incoming signal is completely lost, or if its frequency is
outside the auto-holdover capture range (either a small or large
amount). When the incoming signal returns to normal, the
DPLL will be returned to Normal State.
The Auto-Holdover circuit does not use TIE correction. There-
fore, the phase delay between the input and output after switch-
ing back to Normal State is preserved (is the same as just prior
to the switch to Auto-Holdover).
Modes and States of Operation
The PT7A4402B/4402L operates either in Manual mode or
Automatic mode. Each mode has three possible operating
states, Normal, Holdover or Free-Run.
Shown in Table 4 and Table 5 are the mode and state selection
instructions, using pins MS1, MS2, and RSEL.
Table 4. Input Reference Selection
s
e
d
o
Ms
e
d
o
M
s
e
d
o
M
s
e
d
o
Ms
e
d
o
ML
E
S
RL
E
S
R
L
E
S
R
L
E
S
RL
E
S
Re
c
n
e
r
e
f
e
R
t
u
p
n
Ie
c
n
e
r
e
f
e
R
t
u
p
n
I
e
c
n
e
r
e
f
e
R
t
u
p
n
I
e
c
n
e
r
e
f
e
R
t
u
p
n
Ie
c
n
e
r
e
f
e
R
t
u
p
n
I
l
a
u
n
a
M
0I
R
P
1C
E
S
o
t
u
A
0l
o
r
t
n
o
C
e
n
i
h
c
a
M
e
t
a
t
S
/
e
d
o
M
1d
e
v
r
e
s
e
R
Table 5. Operation Modes and States
2
S
M2
S
M 2
S
M 2
S
M2
S
M1
S
M1
S
M 1
S
M 1
S
M1
S
Ms
e
d
o
Ms
e
d
o
M
s
e
d
o
M
s
e
d
o
Ms
e
d
o
Ms
e
t
a
t
Ss
e
t
a
t
S
s
e
t
a
t
S
s
e
t
a
t
Ss
e
t
a
t
S
00
l
a
u
n
a
Ml
a
m
r
o
N
01
l
a
u
n
a
Mr
e
v
o
d
l
o
H
10
l
a
u
n
a
Mn
u
r
e
r
F
11
o
t
u
A
e
t
a
t
S
/
e
d
o
M
l
o
r
t
n
o
C
e
n
i
h
c
a
M
相關(guān)PDF資料
PDF描述
PT7A4409 Single Axis Bundled System Accelerator1 System Manual
PT7A4409L Complete Motion Control Verilog Library
PT7A4410 PWM Waveform Generator Accelerator Verilog Module
PT7A4410L Incremental Encoder Interface Accelerator Verilog Module
PT7A5020 Power Diagnostics Function Accelerator Verilog Module
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PT7A4409 制造商:未知廠家 制造商全稱:未知廠家 功能描述:T1/E1/0C3 System Synchronizer?
PT7A4409L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:T1/E1/0C3 System Synchronizer?
PT7A4410 制造商:未知廠家 制造商全稱:未知廠家 功能描述:T1/E1/OC3 System Synchronizer
PT7A4410J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:T1/E1/OC3 System Synchronizer
PT7A4410L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:T1/E1/OC3 System Synchronizer