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參數(shù)資料
| 型號(hào)： | PSMN040-200W |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | N-channel TrenchMOS transistor |
| 中文描述： | 50 A, 200 V, 0.04 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-247 |
| 文件頁(yè)數(shù)： | 5/7頁(yè) |
| 文件大?。?/td> | 87K |
| 代理商： | PSMN040-200W |
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
PSMN040-200W
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
)
Fig.14. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
Fig.15. Maximum permissible non-repetitive
avalanche current (I
) versus avalanche time (t
AV
);
unclamped inductive load
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
20
40
60
80
100
120
140
160
180
200
Gate charge, QG (nC)
Gate-source voltage, VGS (V)
ID = 50 A
Tj = 25 C
VDD = 40 V
VDD = 160 V
1
0.001
10
100
0.01
0.1
1
10
Avalanche time, t
AV
(ms)
Maximum Avalanche Current, I
AS
(A)
Tj prior to avalanche = 150 C
25 C
0
5
10
15
20
25
30
35
40
45
50
55
60
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
Source-Drain Voltage, VSDS (V)
Source-Drain Diode Current, IF (A)
Tj = 25 C
175 C
VGS = 0 V
August 1999
5
Rev 1.000
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