參數(shù)資料
型號(hào): PSD934F2
英文描述: Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng))
中文描述: 在8片位微控制器可配置存儲(chǔ)系統(tǒng)(用于8位微控制器的可配置存儲(chǔ)器系統(tǒng))
文件頁(yè)數(shù): 33/94頁(yè)
文件大?。?/td> 477K
代理商: PSD934F2
Preliminary Information
PSD9XX Family
The
PSD9XX
Functional
Blocks
(cont.)
MAIN
FLASH
DPLD
SECONDARY
FLASH
BLOCK
SRAM
RS0
CSBOOT0-3
FS0-7
CS
CS
CS
OE
OE
RD
PSEN
OE
Figure 6. 8031 Memory Modes – Separate Space Mode
MAIN
FLASH
DPLD
SECONDARY
FLASH
BLOCK
SRAM
RS0
CSBOOT0-3
FS0-7
RD
CS
CS
CS
RD
OE
OE
VM REG BIT 2
PSEN
VM REG BIT 0
VM REG BIT 1
VM REG BIT 3
VM REG BIT 4
OE
Figure 7. 80C31 Memory Mode – Combined Space Mode
9.1.3.2 Configuration Modes for MCUs with Separate Program and Data Spaces
9.1.3.2.1 Separate Space Modes
Code memory space is separated from data memory space. For example, the PSEN
signal is used to access the program code from the Flash Memory, while the RD signal is
used to access data from the Boot memory, SRAM and I/O Ports. This configuration
requires the VM register to be set to 0Ch.
9.1.3.2.2 . Combined Space Modes
The program and data memory spaces are combined into one space that allows the main
Flash Memory, Boot memory, and SRAM to be accessed by either PSEN or RD. For
example, to configure the main Flash memory in combined space mode, bits 2 and 4 of the
VM register are set to
1
.
9.1.3.3 80C31 Memory Map Example
See Application Note for examples.
29
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