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| 型號(hào)： | PSD934F2 |
| 英文描述： | Configurable Memory System on a Chip for 8-Bit Microcontrollers(用于8位MCU的可配置存儲(chǔ)器系統(tǒng)) |
| 中文描述： | 在8片位微控制器可配置存儲(chǔ)系統(tǒng)（用于8位微控制器的可配置存儲(chǔ)器系統(tǒng)） |
| 文件頁數(shù)： | 14/94頁 |
| 文件大?。?/td> | 477K |
| 代理商： | PSD934F2 |
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PSD9XX Family
Preliminary Information
10
The following table describes the pin names and pin functions of the PSD9XX. Pins that
have multiple names and/or functions are defined using PSDsoft.
7.0
Table 5.
PSD9XX
Pin
Descriptions
Pin Name
Pin* Type
(PLCC)
Description
ADIO0-7
30-37
I/O
This is the lower Address/Data port. Connect your MCU
address or address/data bus according to the following rules:
1. If your MCU has a multiplexed address/data bus where
the data is multiplexed with the lower address bits,
connect AD[0:7] to this port.
2. If your MCU does not have a multiplexed address/data
bus, or you are using an 80C251 in page mode, connect
A[0:7] to this port.
3. If you are using an 80C51XA in burst mode, connect
A4/D0 through A11/D7 to this port.
ALE or AS latches the address. The PSD drives data out only
if the read signal is active and one of the PSD functional
blocks was selected. The addresses on this port are passed
to the PLDs.
ADIO8-15
39-46
I/O
This is the upper Address/Data port. Connect your MCU
address or address/data bus according to the following rules:
1. If your MCU has a multiplexed address/data bus where
the data is multiplexed with the lower address bits,
connect A[8:15] to this port.
2. If your MCU does not have a multiplexed address/data
bus, connect A[8:15] to this port.
3. If you are using an 80C251 in page mode, connect
AD[8:15] to this port.
4. If you are using an 80C51XA in burst mode, connect
A12/D8 through A19/D15 to this port.
ALE or AS latches the address. The PSD drives data out only
if the read signal is active and one of the PSD functional
blocks was selected. The addresses on this port are passed
to the PLDs.
CNTL0
47
I
The following control signals can be connected to this port,
based on your MCU:
1. WR — active-low write input.
2. R_W — active-high read/active low write input.
This pin is connected to the PLDs. Therefore, these signals
can be used in decode and other logic equations.
CNTL1
50
I
The following control signals can be connected to this port,
based on your MCU:
1. RD — active-low read input.
2. E — E clock input.
3. DS — active-low data strobe input.
4. PSEN — connect PSEN to this port when it is being used
as an active-low read signal. For example, when the
80C251 outputs more than 16 address bits, PSEN is
actually the read signal.
This pin is connected to the PLDs. Therefore, these
signals can be used in decode and other logic equations.
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PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD934F2-15J | 功能描述:SPLD - 簡單可編程邏輯器件 5V 2M 150ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD934F290J | 制造商:WSI 功能描述: |
| PSD934F2-90J | 功能描述:SPLD - 簡單可編程邏輯器件 PLCC-52 5V 2M 90NS RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD934F2-90M | 功能描述:SPLD - 簡單可編程邏輯器件 5V 2M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PSD934F2V-15J | 功能描述:SPLD - 簡單可編程邏輯器件 3.3V 2M 150ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
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