參數(shù)資料
型號(hào)： PSD834F2
英文描述： Flash In-System Programmable (ISP) Peripherals For 8-bit MCUs(用于8位MCUs的閃速ISP外圍)
中文描述： Flash在系統(tǒng)可編程（ISP）為周邊8位微控制器（用于8位微控制器的閃速的ISP外圍）
文件頁數(shù)： 57/98頁
文件大?。?/td> 595K
代理商： PSD834F2
57/98
PSD8XXF2/3/4/5
Table 29. PSD8xxF2/3/4/5 Timing and Stand-by Current during Power-down Mode
Note: 1. Power-down does not affect the operation of the PLD. The PLD operation in this mode is based only on the Turbo bit.
2. Typical current consumption assuming no PLD inputs are changing state and the PLD Turbo bit is 0.
For Users of the HC11 (or compatible).
The
HC11 turns off its E clock when it sleeps. There-
fore, if you are using an HC11 (or compatible) in
your design,and you wish to use the Power-down
mode, you must not connect the E clock to CLKIN
(PD1). You should insteadconnect a crystal oscil-
lator to CLKIN (PD1). The crystal oscillator fre-
quency must be less than 15 times the frequency
of AS.The reason forthis is that ifthe frequency is
greater than 15 times the frequency of AS, the
PSD8xxF2/3/4/5 keeps going into Power-down
mode.
Figure 30. Enable Power-down Flow Chart
Other Power Saving Options.
The PSD8xxF2/
3/4/5 offers other reduced power saving options
that are independent of the Power-down mode.
Except for the SRAM Stand-by and PSD Chip Se-
lect Input (CSI, PD2) features, they are enabled by
setting bits in PMMR0 and PMMR2.
Mode
PLD Propagation
Delay
Memory
Access Time
Access Recovery Time
to Normal Access
Typical Stand-by Current
5V V
CC
3V V
CC
Power-down
Normal t
PD
(Note
1
)
No Access
t
LVDV
75
μ
A (Note
2
)
25
μ
A (Note
2
)
Enable APD
Set PMMR0 Bit 1 = 1
PSD in Power
Down Mode
ALE/AS
idle
for 15 CLKIN
clocks
RESET
Yes
No
OPTIONAL
Disable desired inputs to
PLD
by setting PMMR0 bits 4 and 5
and PMMR2 bits 2 through 6.
AI02892
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參數(shù)描述
PSD834F2-15M 制造商:STMicroelectronics 功能描述:Flash In-System Programmable Peripherals 52-Pin PQFP
PSD834F2-70J 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 2M 70ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD834F2-70M 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 5.0V 2M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD834F2-90J 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 2M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD834F2-90JI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 2M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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