參數(shù)資料
型號(hào)： PSD711S5
英文描述： Field Programmable Microcontroller Peripherals with Supervisory Functions(可編程邏輯，4K位SRAM,27個(gè)可編程I/O,通用PLD有66個(gè)輸入)
中文描述： 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備具有監(jiān)督職能（可編程邏輯，4K的位的SRAM，27余個(gè)可編程輸入/輸出，通用PLD的有66個(gè)輸入）
文件頁(yè)數(shù)： 45/104頁(yè)
文件大?。?/td> 515K
代理商： PSD711S5
PSD7XX Family
13-45
PLD I/O Mode
The PLD I/O mode uses the port as an input to the GPLD Input Micro
Cell, and/or as an
output from the GPLD, ECSPLD. The Port assignments are shown in Tables 10 and 11. The
output can be tri-stated with a control signal defined by a product term (.oe) from the
PLD, or, by setting a zero in the Direction Register. The Direction Register
must not
be set
to “1” if the pin is defined as a PLD input pin. The PLD I/O mode is specified in PSDabel by
declaring the port pins, then writing an equation assigning it to the port.
MCU I/O Mode
In the MCU I/O Mode the microcontroller uses the PSD7XX ports to expand its own I/O
ports. The ports on the PSD7XX are mapped into the microcontroller address space. The
addresses of the ports are listed in Table 28.
A port pin will be put into MCU I/O mode by writing a zero to the corresponding bit in the
Control Register. The direction may be changed by writing to the Direction Register for
the port where a “1” makes it an output and a “0” an input. The output enable product
term also can change the direction of the pin (see Table 20 and 21). When the pin is
configured as output, the content of the Data Out Register drives the pins. In input mode,
the microcontroller reads the port input through the Data In buffer
Ports C and D do not have a Control Register and are in MCU I/O mode by default for pins
that are not configured as PLD I/O.
Address Out Mode
For microcontrollers with a multiplexed address/data bus, the ports in Address Out mode
drive latched addresses to external devices. Address [7:0] are always assigned to Port A.
See Table 29 for the address output pin assignments on Ports A and B. The Direction
Register and the Control Register must be set to a “1” for port pins using Address Out
mode.
In non-multiplexed 8 bit bus mode, address[7:0] are available on Port B in Address Out
Mode.
I/O Ports
(cont.)
相關(guān)PDF資料
PDF描述
PSD712S5 Field Programmable Microcontroller Peripherals with Supervisory Functions(可編程邏輯，4K位SRAM,27個(gè)可編程I/O,通用PLD有66個(gè)輸入)
PSD713S5 Field Programmable Microcontroller Peripherals with Supervisory Functions(可編程邏輯，4K位SRAM,27個(gè)可編程I/O,通用PLD有66個(gè)輸入)
PSD813F4 Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲(chǔ)器，256K位EEPROM，16K位SRAM)
PSD813F Flash In-System-Programmable Microcontroller Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲(chǔ)器，256K位EEPROM，16K位SRAM)
PSD813FH(中文) Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場(chǎng)可編程微控制器)
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