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| 型號： | PSD602E1 |
| 英文描述： | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
| 中文描述： | 現(xiàn)場可編程微控制器外圍設(shè)備和嵌入式微-細胞（可編程邏輯，4K的位的SRAM，26我個可編程輸入/輸出，通用PLD的有63個輸入） |
| 文件頁數(shù)： | 5/84頁 |
| 文件大?。?/td> | 426K |
| 代理商： | PSD602E1 |
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PSD6XX Family
11-5
Pin Name
Pin
Type
Function Description
Reset
48
I
Active low input. Resets I/O Ports, PLD Micro
Cells and
some of the Configuration Registers. Must be active at
power up.
PA0
PA1
PA2
PA3
29
28
27
25
I/O
Port A, PA0 – 3. This port is pin configurable and has
multiple functions:
1. MCU I/O – standard output or input port
2. External chip select (ECSPLD) output, or input to GPLD
3. Latched address outputs (see Table 3)
4. As Address A0-3 inputs in 80C51XA mode
5. As Data Bus Port (D0–3) in non-multiplexed bus
configuration
6. Peripheral I/O mode
PA4
PA5
PA6
PA7
24
23
22
21
I/O
Port A, PA4–7. This port is pin configurable and has
multiple functions:
1. MCU I/O – standard output or input port
2. GPLD Micro
Cell (McellAB) output or input
3. Latched address outputs (see Table 3)
4. As Data Bus Port (D4–7) in non-multiplexed bus
configuration
5. Peripheral I/O mode
CMOS
or
Open
Drain
PB0
PB1
PB2
PB3
7
6
5
4
I/O
Port B, PB0–3. This port is pin configurable and has
multiple functions:
1. MCU I/O – standard output or input port
2. External chip select (ECSPLD) output, or input to GPLD
3. Latched address outputs (see Table 3)
4. As Data Bus Port (D8-11) in non-multiplexed bus
configuration with 16-bit data bus
PB4
PB5
PB6
PB7
3
2
I/O
Port B, PB4–7. This port is pin configurable and has multiple
functions:
1. MCU I/O – standard output or input port
2. GPLD Micro
Cell (McellAB) output or input
3. Latched address outputs (see Table 3)
4. As Data Bus Port (D12–15) in non-multiplexed bus
configuration with 16-bit data bus
CMOS
or
Open
Drain
52
51
PC0
PC1
PC3
PC4
PC5
PC6
PC7
(WRH)
20
19
17
14
13
12
11
I/O
Port C, PC0, PC1, PC3–7. This port is pin configurable and
has multiple functions:
1. MCU I/O – standard output or input port
2. GPLD Micro
Cell (McellC) output or input
3. PC7 pin only (WRH), Write strobe input for high byte.
Active low, for 16-bit MCU with WRH
CMOS
or
Open
Drain
PC2
(Vstby)
18
I
Port C pin PC2.
Dedicated SRAM Standby Voltage Input. Pin should be
grounded if Vstby is not required.
Table 2.
PSD6XXE1 Pin
Descriptions
(cont.)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD602E1-70L | 制造商:WSI 功能描述: |
| PSD603E1-70L | 制造商:WSI 功能描述: |
| PSD60-A | 制造商:WALL 制造商全稱:Wall Industries,Inc. 功能描述:60 Watt Dual Output AC/DC Power Supply |
| PSD60-B | 制造商:WALL 制造商全稱:Wall Industries,Inc. 功能描述:60 Watt Dual Output AC/DC Power Supply |
| PSD61 | 制造商:POWERSEM 制造商全稱:POWERSEM 功能描述:Three Phase Rectifier Bridges |
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