參數(shù)資料
型號: PSD512B1
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設備(可編程邏輯,16K的位的SRAM,40余個可編程輸入/輸出,通用PLD的有61個輸入)
文件頁數(shù): 15/25頁
文件大?。?/td> 186K
代理商: PSD512B1
PSD5XX – Application Note 042
4-311
Figure 15. Block Diagram for the Register Configuration and
Interrupt Operation
80C186
Interface to the
PSD503
(Cont.)
PSD503 Timer Initialization
Load Command Register for Each Timer by 0x99
Read Interrupt Read Register To Clear All Interrupts
Select all Interrupt Inputs to Rising Edge
Unmask the Timer Interrupt in Mask Register
Configure the 80C186 Interrupt
Load Counter Count Register with New Count
Load Image Register for the Timers
Set DLCY Register to 0x04
Select Port A for Timer Output
Load Image Register for The Timers
Select Software Load/Start for the Start up
Enable the Timers from Global Register
Enable the Respective Timer for Operation
Wait for Interrupt
Read Interrupt Priority Register
Determine the Respective Timer Interrupt
Load the Respective Image Register for the Timer
NO
Interrupt Occurred
YES
相關PDF資料
PDF描述
PSD513B1 Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
PSD611E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
PSD601E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
PSD602E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
PSD603E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
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