參數(shù)資料
型號： PSD501B1-C-70U
廠商： 意法半導(dǎo)體
英文描述： Low Cost Field Programmable Microcontroller Peripherals
中文描述： 低成本現(xiàn)場可編程微控制器外圍設(shè)備
文件頁數(shù)： 92/153頁
文件大?。?/td> 1036K
代理商： PSD501B1-C-70U
PSD5XX Famly
89
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
*
*
*
*
FrezAck3
FrezAck2
FrezAck1
FrezAck0
NOTES:
At RESET all these bits intialize as 0's.
*
= Not used.
9.6.2.6 Status Flags Register
There are eight READ-ONLY status flags. The lower four bits represent Freeze
Acknowledge bits.
Counter/Timer
Registers
(Cont.)
FrezAck Bits
These Freeze Acknowledge bits are useful in the Freeze/Freeze Acknowledge protocol.
After the Microcontroller senses that the FrezAck bit is being set it proceeds to access the
Image Register for a read or write operation.
FrezAck0 Bit:
When this bit is
1:
Image Register Access is granted.
0:
Image Register Access is not granted.
FrezAck1 Bit:
When this bit is
1:
Image Register Access is granted.
0:
Image Register Access is not granted.
FrezAck2 Bit:
When this bit is
1:
Image Register Access is granted.
0:
Image Register Access is not granted.
FrezAck3 Bit:
When this bit is
1:
Image Register Access is granted.
0:
Image Register Access is not granted.
DLCY Register:
Bits
<
4:0
>
of the DLCY register are used to assign Delay Cycles to the Counter/Timer.
Various Clock Scaling values possible are 0 through 31 (decimal).
At RESET these bits initialize as 0. If necessary, the user has the option to set these bits up
to generate Delay Cycles (DLCY) to scale down the Counter/Timer clock (see Table 24).
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
*
*
*
DLCY4
DLCY3
DLCY2
DLCY1
DLCY0
NOTE:
*
= Not used.
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參數(shù)描述
PSD501B1-C-90JI 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals
PSD501B1C-90JI 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 256K 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
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