參數(shù)資料
型號(hào): PSD4235G2V-70M
廠商: 意法半導(dǎo)體
英文描述: Flash In-System-Programmable Peripherals for 16-Bit MCUs
中文描述: Flash在系統(tǒng)可編程外設(shè)的16位微控制器
文件頁數(shù): 82/89頁
文件大小: 702K
代理商: PSD4235G2V-70M
PSD4235G2V
82/89
Table 69. Reset (Reset) Timing
Note: 1. Reset (RESET) does not reset Flash memory Program or Erase cycles.
2. Warm reset aborts Flash memory Program or Erase cycles, and puts the device in Read mode.
Figure 48. Reset (RESET) Timing
Table 70. V
STBYON
Timing
Symbol
Note: 1. V
STBYON
timing is measured at V
CC
ramp rate of 2 ms.
Table 71. Program, Write and Erase Times
Symbol
Note: 1. Programmed to all zero before erase.
2. The polling status, DQ7, is valid tQ7VQV time units before the data byte, DQ0-DQ7, is valid for reading.
3. DQ7 is DQ15 for Motorola MCU with 16-bit data bus.
Symbol
Parameter
Conditions
Min
Max
Unit
t
NLNH
RESET Active Low Time
1
300
ns
t
NLNH–PO
Power On Reset Active Low Time
1
ms
t
NLNH–A
Warm Reset Active Low Time
2
25
μ
s
t
OPR
RESET High to Operational Device
300
ns
Parameter
Conditions
Min
Typ
Max
Unit
t
BVBH
V
STBY
Detection to V
STBYON
Output High
(Note
1
)
20
μs
t
BXBL
V
STBY
Off Detection to V
STBYON
Output
Low
(Note
1
)
20
μs
Parameter
Min.
Typ.
Max.
Unit
Flash Program
8.5
s
Flash Bulk Erase
1
(pre-programmed)
3
30
s
Flash Bulk Erase (not pre-programmed)
10
s
t
WHQV3
Sector Erase (pre-programmed)
1
30
s
t
WHQV2
Sector Erase (not pre-programmed)
2.2
s
t
WHQV1
Byte Program
14
1200
μs
Program / Erase Cycles (per Sector)
100,000
cycles
t
WHWLO
Sector Erase Time-Out
100
μs
t
Q7VQV
DQ7 Valid to Output (DQ7-DQ0) Valid (Data Polling)
2,3
30
ns
tNLNH-PO
Power-On Reset
tOPR
AI02866b
RESET
tNLNH
tNLNH-A
Warm Reset
tOPR
V
CC
V
CC
(min)
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