參數(shù)資料
型號(hào): PSD401A1-C-70J
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 16K X 16 OTPROM, 40 I/O, PIA-GENERAL PURPOSE, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 81/123頁
文件大?。?/td> 755K
代理商: PSD401A1-C-70J
Obsolete
Product(s)
- Obsolete
Product(s)
9.3.12 Port C and Port D – Functionality and Structure
Ports C and D are identical in function and structure and each can be configured to perform
one or more of the following operating modes:
t Standard MCU I/O Mode
t PLD Input – direct input to ZPLD
(PSD4XXA2 and ZPSD4XXA2 Only)
t Address Out – latched address outputs
– Port C: A[0-7] are assigned to pins PC[0-7]
– Port D: A[0-7] for 8-bit multiplexed bus or A[8-15] for 16-bit multiplexed
bus are assigned to pins PD0-7]
t Data Port
– Port C: D[0-7] for 8-bit non-multiplexed bus
– Port D: D[8-15] for 16-bit non-multiplexed bus
t Open Drain – select CMOS or Open Drain driver
Figures 29 and 30 show the structure of a Port C or D pin. If the pin is configured as output
port, the multiplexer selects one of the two inputs as output. If the pin is configured as input,
the input connects to :
t Data In Register as input in the Standard MCU I/O Mode
or
t ZPLD input (PSD4XXA2 and ZPSD4XXA2 Only)
9.3.13 Port E – Functionality and Structure
Port E can be configured to perform one or more of the following functions:
t Standard MCU I/O Mode
t PLD I/O (PSD4XXA2 and ZPSD4XXA2 Only)
t Address Out – latched address lines A[0-7] are assigned to pins PE[0-7]
t Alternate Function In – in this mode, the inputs to Port E pins are:
– PE0
BHE or PSEN or WRH or UDS or SIZ0
– PE1 – ALE
– PE7
APD CLK :clock input for Automatic Power Down Counter
Figure 31 shows the structure of a Port E pin. The Control Logic block selects one of four
sources through the multiplexer for pin output. If the pin is configured as input, the input
goes to:
t Data In Register as input in Standard MCU I/O Mode
or
t PE Macrocell as PLD input (PSD4XXA2 and ZPSD4XXA2 Only)
or
t Alternate Function In
PSD4XX Family
57
PSD4XX Family
The PSD4XX
Architecture
(cont.)
相關(guān)PDF資料
PDF描述
PSD413A2-C-70J 128K X 8 OTPROM, 40 I/O, PIA-GENERAL PURPOSE, PQCC68
PSD402A2-C-15L 32K X 16 UVPROM, 40 I/O, PIA-GENERAL PURPOSE, CQCC68
PSD4235G2-A-15U 4M X 1 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
PSD4235G2-A-20UI 4M X 1 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
PSD813F2A-15JI 128K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52
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