參數(shù)資料
型號(hào): PK30X256VMD100
廠商: Freescale Semiconductor
文件頁數(shù): 60/74頁
文件大?。?/td> 0K
描述: IC ARM CORTEX MCU 256K 144-MAP
產(chǎn)品培訓(xùn)模塊: Kinetis® Cortex-M4 Microcontroller Family
標(biāo)準(zhǔn)包裝: 1
系列: Kinetis
核心處理器: ARM? Cortex?-M4
芯體尺寸: 32-位
速度: 100MHz
連通性: CAN,EBI/EMI,I²C,IrDA,SDHC,SPI,UART/USART
外圍設(shè)備: DMA,I²S,LCD,LVD,POR,PWM,WDT
輸入/輸出數(shù): 102
程序存儲(chǔ)器容量: 256KB(256K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.71 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 37x16b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 144-LBGA
包裝: 托盤
2. For highest glass capacitance values, LCD_GCR[LADJ] should be configured as specified in the LCD Controller chapter
within the device's reference manual.
3. VIREG maximum should never be externally driven to any level other than VDD - 0.15 V
4. 2000 pF load LCD, 32 Hz frame frequency
7 Dimensions
7.1 Obtaining package dimensions
Package dimensions are provided in package drawings.
To find a package drawing, go to freescale.com and perform a keyword search for the
drawing’s document number:
If you want the drawing for this package
Then use this document number
144-pin LQFP
98ASS23177W
144-pin MAPBGA
98ASA00222D
8 Pinout
8.1 K30 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
144
LQFP
144
MAP
BGA
Pin Name
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
L5
RESERVED
M5
NC
1
D3
PTE0
ADC1_SE4a
PTE0
SPI1_PCS1
UART1_TX
SDHC0_D1
FB_AD27
I2C1_SDA
2
D2
PTE1/
LLWU_P0
ADC1_SE5a
PTE1/
LLWU_P0
SPI1_SOUT
UART1_RX
SDHC0_D0
FB_AD26
I2C1_SCL
3
D1
PTE2/
LLWU_P1
ADC1_SE6a
PTE2/
LLWU_P1
SPI1_SCK
UART1_CTS_
b
SDHC0_DCLK FB_AD25
4
E4
PTE3
ADC1_SE7a
PTE3
SPI1_SIN
UART1_RTS_
b
SDHC0_CMD FB_AD24
5
E5
VDD
6
F6
VSS
Dimensions
K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
Freescale Semiconductor, Inc.
63
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