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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | PK20N512VMD100 |
| 寤犲晢锛� | Freescale Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 26/75闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC ARM CORTEX MCU 512K 144-MAP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Kinetis® Cortex-M4 Microcontroller Family |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 绯诲垪锛� | Kinetis |
| 鏍稿績铏曠悊鍣細 | ARM? Cortex?-M4 |
| 鑺珨灏哄锛� | 32-浣� |
| 閫熷害锛� | 100MHz |
| 閫ｉ€氭€э細 | CAN锛孍BI/EMI锛孖²C锛孖rDA锛孲DHC锛孲PI锛孶ART/USART锛孶SB锛孶SB OTG |
| 澶栧湇瑷�(sh猫)鍌欙細 | DMA锛孖²S锛孡VD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 100 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 512KB锛�512K x 8锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 128K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.71 V ~ 3.6 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 33x16b锛孌/A 2x12b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 105°C |
| 灏佽/澶栨锛� | 144-LBGA |
| 鍖呰锛� | 鎵樼洡 |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�鐣�(d膩ng)鍓嶇26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�绗�43闋�绗�44闋�绗�45闋�绗�46闋�绗�47闋�绗�48闋�绗�49闋�绗�50闋�绗�51闋�绗�52闋�绗�53闋�绗�54闋�绗�55闋�绗�56闋�绗�57闋�绗�58闋�绗�59闋�绗�60闋�绗�61闋�绗�62闋�绗�63闋�绗�64闋�绗�65闋�绗�66闋�绗�67闋�绗�68闋�绗�69闋�绗�70闋�绗�71闋�绗�72闋�绗�73闋�绗�74闋�绗�75闋�
Table 17. Oscillator frequency specifications (continued)
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
fosc_hi_2
Oscillator crystal or resonator frequency 鈥� high
frequency mode (high range)
(MCG_C2[RANGE]=1x)
8
鈥�
32
MHz
fec_extal
Input clock frequency (external clock mode)
鈥�
50
MHz
tdc_extal
Input clock duty cycle (external clock mode)
40
50
60
%
tcst
Crystal startup time 鈥� 32 kHz low-frequency,
low-power mode (HGO=0)
鈥�
750
鈥�
ms
Crystal startup time 鈥� 32 kHz low-frequency,
high-gain mode (HGO=1)
鈥�
250
鈥�
ms
Crystal startup time 鈥� 8 MHz high-frequency
(MCG_C2[RANGE]=01), low-power mode
(HGO=0)
鈥�
0.6
鈥�
ms
Crystal startup time 鈥� 8 MHz high-frequency
(MCG_C2[RANGE]=01), high-gain mode
(HGO=1)
鈥�
1
鈥�
ms
1. Other frequency limits may apply when external clock is being used as a reference for the FLL or PLL.
2. When transitioning from FBE to FEI mode, restrict the frequency of the input clock so that, when it is divided by FRDIV, it
remains within the limits of the DCO input clock frequency.
3. Proper PC board layout procedures must be followed to achieve specifications.
4. Crystal startup time is defined as the time between the oscillator being enabled and the OSCINIT bit in the MCG_S register
being set.
NOTE
The 32 kHz oscillator works in low power mode by default and
cannot be moved into high power/gain mode.
6.3.3 32 kHz Oscillator Electrical Characteristics
This section describes the module electrical characteristics.
6.3.3.1 32 kHz oscillator DC electrical specifications
Table 18. 32kHz oscillator DC electrical specifications
Symbol
Description
Min.
Typ.
Max.
Unit
VBAT
Supply voltage
1.71
鈥�
3.6
V
RF
Internal feedback resistor
鈥�
100
鈥�
M惟
Cpara
Parasitical capacitance of EXTAL32 and XTAL32
鈥�
5
7
pF
Vpp1
Peak-to-peak amplitude of oscillation
鈥�
0.6
鈥�
V
1. When a crystal is being used with the 32 kHz oscillator, the EXTAL32 and XTAL32 pins should only be connected to
required oscillator components and must not be connected to any other devices.
Peripheral operating requirements and behaviors
K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
32
Freescale Semiconductor, Inc.
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