參數(shù)資料
型號: PIC24FJ32GA002-E/SS
廠商: Microchip Technology
文件頁數(shù): 2/52頁
文件大小: 0K
描述: IC PIC MCU FLASH 32K 28-SSOP
特色產(chǎn)品: PIC24FJ/33FJ MCUs & dsPIC? DSCs
標(biāo)準(zhǔn)包裝: 47
系列: PIC® 24F
核心處理器: PIC
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,PMP,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 21
程序存儲器容量: 32KB(11K x 24)
程序存儲器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 647 (CN2011-ZH PDF)
配用: DM240011-ND - KIT STARTER MPLAB FOR PIC24F MCU
AC162088-ND - HEADER MPLAB ICD2 24FJ64GA004 28
AC164338-ND - MOD SKT PIC24F/DSPIC33F 28SOIC
DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
PIC24FJXXXGA0XX
DS39768D-page 10
2008 Microchip Technology Inc.
2.4
Memory Map
The program memory map extends from 000000h to
FFFFFEh. Code storage is located at the base of the
memory map and supports up to 44K instruction words
(about 128 Kbytes). Table 2-3 shows the program
memory size and number of erase and program blocks
present in each device variant. Each erase block, or
page, contains 512 instructions, and each program
block, or row, contains 64 instructions.
Locations 800000h through 8007FEh are reserved for
executive code memory. This region stores the
programming executive and the debugging executive.
The programming executive is used for device pro-
gramming and the debugging executive is used for
in-circuit debugging. This region of memory can not be
used to store user code.
The last two implemented program memory locations
are reserved for the device Configuration registers.
TABLE 2-2:
FLASH CONFIGURATION
WORD LOCATIONS FOR
PIC24FJXXXGA0XX DEVICES
Locations, FF0000h and FF0002h, are reserved for the
Device ID registers. These bits can be used by the
programmer to identify what device type is being
programmed. They are described in Section 6.1
“Device ID”. The Device ID registers read out
normally, even after code protection is applied.
shows
the
memory
map
for
the
PIC24FJXXXGA0XX family variants.
TABLE 2-3:
CODE MEMORY SIZE
Device
Configuration Word
Addresses
12
PIC24FJ16GA
002BFEh
002BFCh
PIC24FJ32GA
0057FEh
0057FCh
PIC24FJ48GA
0083FEh
0083FCh
PIC24FJ64GA
00ABFEh
00ABFCh
PIC24FJ96GA
00FFFEh
00FFFCh
PIC24FJ128GAGA
0157FEh
0157FCh
Device
User Memory
Address Limit
(Instruction Words)
Write
Blocks
Erase
Blocks
PIC24FJ16GA
002BFEh (5.5K)
88
11
PIC24FJ32GA
0057FEh (11K)
176
22
PIC24FJ48GA
0083FEh (16.5K)
264
33
PIC24FJ64GA
00ABFEh (22K)
344
43
PIC24FJ96GA
00FFFEh (32K)
512
64
PIC24FJ128GA
0157FEh (44K)
688
86
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